Toshiba Adds 64-Bit MIPS-based Embedded Microprocessor With Integrated PCI Interface.Business Editors/High-Tech Writers SAN JOSE, Calif.--(BUSINESS WIRE)--Jan. 30, 2001 ISA- and functionally upward compatible with Toshiba's best-selling 32-bit RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. + PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). microprocessor, the new chip offers a shortcut to higher performance in new designs and upgrades Toshiba America Electronic Components, Inc. (TAEC TAEC Toshiba America Electronic Components, Inc. TAEC Thailand Atomic Energy Commission ) with its parent company Toshiba Corporation (Toshiba) today announced availability in production quantities of a new, higher-performance member of its MIPS-based microprocessor family that integrates a comprehensive array of on-chip peripherals. The 64-bit TX4927(TM) microprocessor is a follow-on to the 32-bit TX3927(TM) chip, which is currently the most popular microprocessor in Toshiba's lineup. The wider bandwidth plus higher performance in the new IC will allow system designers to create a new generation of products, and the family commonality will allow rapid implementation of new designs and upgrades. "Historically, the highly-integrated controller with full peripheral capabilities has hit the sweet spot for many system designers," said Jim Smith, business development director for Toshiba America's microprocessor unit. "Our first design win was with a customer whose alternatives had all required separate northbridge chips. Compared to an ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. , the TX4927 reduces hardware design time and risk, and compared to a multi-chip approach, it saves board space and increases performance. If a design calls for a fast 64bit pipelined RISC processor, the TX4927 is ideal." Technical Details The Toshiba TX49/H2 processor core is an optimized five-stage pipeline with a 64-bit data path, based on MIPS architecture. The core incorporates a memory management unit (MMU). The MMU's 48-double entry translation lookaside buffer A Translation Lookaside Buffer (TLB) is a CPU cache that is used by memory management hardware to improve the speed of virtual address translation. A TLB has a fixed number of slots containing page table entries, which map virtual addresses onto physical addresses. (TLB) with its fourway set-associative 32-KByte instruction and data caches allows the core to meet Windows CE(TM) MMU requirements. A hardware multiply accumulator (MAC) and single/double-precision floating-point unit (FPU) are also integrated with the core. The instruction set supports MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. I, II, and III instructions, plus MIPS IV prefetch To bring data or instructions into a higher-speed storage or memory before it is actually processed. See cache. prefetch - instruction prefetch , multiply/add and debug instructions. External to the microprocessor core, the chip's integrated SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. memory controller can handle four channels of registered/non-registered DIMM (Dual In-Line Memory Module) A printed circuit board that holds memory chips and plugs into a DIMM socket on the motherboard. See memory module. DIMM - Dual In-Line Memory Module SDRAM (100-MHz max.) with ECC (1) (Error-Correcting Code) A type of memory that corrects errors on the fly. See ECC memory. (2) (Elliptic Curve Cryptography) A public key cryptography method that provides fast decryption and digital signature processing. , in configurations up to two GBytes. An external bus controller supports eight channels of ROM, Flash and memory-mapped I/O devices. A PCI bus controller supports either four 33-MHz or two 66-MHz bus masters. It fully complies with revision 2.2 of the PCI Local Bus Specification with PCI booting. A DMA controller supports four independent channels plus one channel for specialized PCI, interrupt controllers capable of monitoring 18 different sources, two UART (Universal Asynchronous Receiver Transmitter) The electronic circuit that makes up the serial port. Also known as "universal serial asynchronous receiver transmitter" (USART), it converts parallel bytes from the CPU into serial bits for transmission, and vice channels, three 32-bit timer/counter channels, and 16-bit bi-directional parallel-IO ports. The TX4927 microprocessor is built on Toshiba's 0.18-micron, 3.3V I/O / 1.5V core process technology. Hardware and Software Development Environment TX4927 microprocessors support enhanced JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group (EJTAG EJTAG Enhanced JTAG (MIPS processors) ), which allows complete boundary-scan access to access inside registers and integrated peripherals. EJTAG can be used to provide single-step execution and hardware break-points for debugging the processor system. Development tools include an evaluation board with PCI slots, plus Corelis NetICE(TM) in-circuit emulator and ROM emulator as hardware, and RedHat's GNU C compiler/simulator/debugger as software. Real-time operating systems supported include embedded Linux(TM), Wind River Systems' VxWorks(R)/Tornado(R)II package, RedHat eCOS(TM), and Microsoft Windows CE. Package The TX4927 microprocessor comes in a 35 x 35 x 1.7-mm, 420-lead ball-grid array with a 1.27-mm ball pitch. Price and Delivery Production quantities of the 200MHz version of the TX4927 are available today at $35.00 (In quantities of 10,000). About TAEC TAEC, recognized as one of the largest suppliers of semiconductor, electronic component, and storage solutions, is the North American engineering, manufacturing, marketing, and sales arm of Japan's Toshiba Semiconductor Company and Toshiba Display Devices and Components Company. The Toshiba Semiconductor Company is one of the world's leading manufacturers and suppliers of semiconductor products including LSIs, microprocessors and controllers, and advanced memory products, in addition to discrete and analog peripheral components. TAEC is also responsible for sales and marketing of other major electronic components including liquid crystal displays, color display and picture tubes, lithium-ion and other secondary batteries. For additional information, please visit TAEC's Web site at www.toshiba.com/taec. Note to Editors: TX3927 and TX4927 are trademarks of Toshiba America Electronic Components, Inc. MIPS is a trademark of MIPS Technologies, Inc. Windows CE is a trademark of Microsoft Corporation. Corelis NetICE is a trademark of Corelis, Inc. LINUX is a trademark of Linus Torvalds. Red Hat is a registered trademark of Red Hat Software, Inc. Red Hat eCOS is a trademark of Red Hat Software, Inc. Wind River Systems' VXWorks is a registered trademark of Wind River Systems, Inc. Tornado II is a registered trademark of Wind River Systems, Inc. |
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