Teseda Supports Mentor Graphics FastScan and TestKompress Products with Complete Design-to-Test-to-Diagnosis Flow.

Business Editors/High-Tech Writers

Design Automation Conference 2003

ANAHEIM, Calif.--(BUSINESS WIRE)--June 2, 2003

40th Design Automation Conference Attendees Can See Integrated

FastScan & Validator 500 Demo of Diagnostic Flow on Sharp

Microelectronic's New BlueStreak Microcontroller

At the Design Automation Conference (DAC) here today, Teseda Corporation announced full support for the Mentor Graphics(R) industry-leading FastScan(TM) automatic test pattern generation (ATPG) and the TestKompress(R) embedded deterministic test products. The products are supported on a low-cost, Design-for-Test (DFT)-Focused(TM) engineering test system -- Teseda's Validator 500(TM) (V500(TM)).

"The seamless diagnostic debug flow between Mentor's world class DFT tools and the V500 provides fast time-to-market with a DFT-based flow," said Robert Hum, vice president and general manager of the Design Verification and Test division of Mentor Graphics. "Once our customers have silicon and test patterns through use of either FastScan or TestKompress, they can now quickly bring up and debug their devices and, if necessary, isolate faults by sending failure information back to our DFT tools."

"The V500 was designed to fully exercise devices that incorporate FastScan and TestKompress technology," said Steve Morris, president and CEO of Teseda. "And because Mentor's flow is STIL-based, no pattern translation is required. Combining the DFT expertise of Mentor and Teseda translates to maximum return for our customers in terms of cost, speed, and quality."

The V500 is a laptop-sized, affordable test system that design and product engineers use to accelerate DFT-based engineering test processes, such as chip and test validation and debug, fault isolation, and sample qualification. Together, Mentor's DFT tools and the V500 create a fully integrated flow that minimizes the time-to-production for DFT-enabled devices. The integrated flow is based on the IEEE 1450 Standard Test Interface Language (STIL), which supports direct transfer of ATPG patterns to the V500 for engineering test. The V500 records device failure information so that it can be used directly by FastScan and TestKompress for failure diagnostics.

DAC Attendees Can View Demonstration of Actual Device

The complete flows for both FastScan and TestKompress will be demonstrated at DAC in the Mentor Graphics demo suite, number 2532. The FastScan demonstration will be for an actual device -- the recently announced Sharp Microelectronics BlueStreak(TM) LH74501 microcontroller. The flow will include stuck-at-scan pattern generation, direct import and execution of the scan patterns on the V500, logging of structural failure information by the V500, and identification by FastScan of the failure to the specific gate based on all of the logged information. The TestKompress demonstration will also show a complete diagnostic loop based on a sample device embodying a TestKompress design.

Visit http://www.mentor.com/dac/sessions.cfm for more information about the sessions.

About Teseda Corporation

Teseda Corporation of Portland, Ore., is founded on the overriding idea that adoption of design-for-test is resulting in a disruptive change in the IC test industry that will change the way integrated circuits are tested. Teseda's mission is to provide engineering and production-floor DFT-Focused test solutions that dramatically reduce test cost and accelerate time-to-volume. For more information, visit www.teseda.com.

About Mentor Graphics

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Teseda, the Teseda logo, Validator 500, V500, and DFT-Focused are trademarks of Teseda Corporation. Mentor Graphics and TestKompress are registered trademarks and FastScan is a trademark of Mentor Graphics Corporation. All other trademarks are property of their respective owners.