Teradyne Introduces the J750Ex: the Next-Generation of Low-Cost Test.
NORTH READING, Mass. -- Teradyne, Inc. (NYSE: TER), a world leader in high efficiency, low-cost test, will unveil and demonstrate for the first time the new J750Ex(TM) that delivers a step function improvement in throughput and test economics. The system will be shown at SEMICON China, March 21 - 23, at the Shanghai New International Expo Center, Shanghai. The J750 is the foundation of one of the most successful platforms in ATE history with an installed base approaching 2500 systems worldwide.
The J750Ex high parallel test configuration delivers more than 50% higher throughput and 99% parallel test efficiency across a wide range of device pin counts and types. It reduces cost of test even as device complexity continues to rise for manufacturers. The J750Ex features 200 MHz/400 Mbps digital performance and dedicated instrument resources for digital, mixed signal, memory and converter test. All J750 systems are DIB compatible, and the tens of thousands of existing J750 test programs can be run on the J750Ex. Customers can easily upgrade currently installed J750 systems to the J750Ex. Pricing for J750 family configurations starts at $99,000.
"We are extremely excited to continue the J750 tradition of delivering low cost of test. The parallel test capability, test efficiency, and low capital cost of the J750 radically changed device test economics for manufacturers," said Doug Elder, Vice President, General Manager, Semiconductor Test Business Units, Teradyne. "The J750Ex introduces a new generation of low cost test for a wide variety of applications where high volume and low cost are essential. It can test increasingly complex devices while delivering the high production volume and low cost of test required in the price sensitive consumer device arena."
Teradyne's J750Ex delivers 200 MHz/400 Mbps digital performance, deep vector memory, and accurate edge placement in a per-pin test architecture. It also provides up to 64M LVM vector depth and enhanced DFT capability with 196 Gbit scan depth and deep diagnostic capture. An air-cooled, "zero-footprint" design makes efficient use of manufacturing floor space, and flexible site mapping with no slot boundaries enables multisite testing of 256 sites or greater.
Multiple options add to the J750Ex test capability with precision, pattern-controlled high density VI sourcing for higher site counts, and testing for integrated device technologies, such as audio, memory and embedded converters. The J750Ex also features enhancements to Teradyne's industry-leading Digital Signal Source and Capture technology. These capabilities are crucial for high quality, high throughput testing of SOC devices.
The system's IG-XL(TM) operating system is the standard software used on more than 3500 Teradyne systems worldwide, spanning the 750 and FLEX(TM) test platforms. IG-XL software is designed for rapid program development that automatically scales to multisite test, speeding time to market and saving development time and cost.
The J750 family has full DIB compatibility and quick test program migration across all J750 configurations, with software edits to make use of new J750Ex hardware taking less than an hour for most programs. With new features and installed base compatibility, the J750Ex takes the test floor to the next-generation while letting customers stay focused on semiconductor innovation.
Teradyne (NYSE:TER) is a leading supplier of Automatic Test Equipment used to test complex electronics for the consumer electronics, automotive, computing, telecommunications, and aerospace and defense industries. In 2006, Teradyne had sales of $1.38 billion, and currently employs about 3,800 people worldwide. For more information, visit www.teradyne.com. Teradyne (R) is a registered trademark of Teradyne, Inc. in the U.S. and other countries. All product names are trademarks of Teradyne, Inc. (including its subsidiaries) or their respective owners.
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|Date:||Mar 18, 2007|
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