Tera Systems, Inc. to Enforce Intellectual Property Rights in RTL Silicon Virtual Prototype Technology.Business Editors/High-Tech Writers CAMPBELL, Calif.--(BUSINESS WIRE)--Aug. 28, 2003 Tera Systems, Inc. has retained Robert Greene Sterne of Sterne, Kessler, Goldstein & Fox as lead attorney to enforce its intellectual property rights relating to US Patent #6,145,117 and US Patent #6,360,356, which covers the RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; Silicon Virtual Prototype (RTL SVP SVP S'il Vous Plaît (French: Please) SVP Senior Vice President SVP Schweizerische Volkspartei (Swiss People~s Party) SVP Society of Vertebrate Paleontology SVP Social Venture Partners SVP St Vincent de Paul ) technology used to create optimized physical implementation from the RTL description of electronic design. This critical technology continues to propel RTL Handoff methodology with industry leading TeraForm Frontend Design Planning solution in the market place. "Tera Systems is the pioneer of the RTL SVP market. Our products have been widely adopted by leading ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. vendors such as IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) , LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Logic, and NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98). NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd. as well as major electronics companies such as Sony, HP, and Matsushita. The market for RTL SVP is expanding rapidly. Many EDA companies are entering the market. As the inventor and key patent holder in the RTL SVP area, we intend to protect our intellectual property right vigorously to preserve and enhance shareholder value," said Alain Labat, President and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Tera Systems, Inc. "Tera Systems has broad claims in RTL SVP technology based on patents already issued and patents pending. With our firm's experience in IP rights enforcement, Tera is in a good position to reap maximum benefits from its inventions," said Robert Sterne, a founding partner of Sterne, Kessler, Goldstein & Fox. RTL SVP relates to EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. tools and design flows that enable the optimization of RTL with respect to chip performance parameters including area, timing, and power, prior to logic synthesis and place & route. RTL SVP overcomes the limitations of conventional top-down design methodology by providing designers with an interactive 'virtual' back-end environment, which models physical effects and implementations, thereby enabling front-end micro-architectural optimization at RTL before synthesis. The system automatically searches the solution space and derives an optimal solution for rapid timing convergence. It then generates all necessary data to drive back-end tools to implement that solution. The ability to achieve better silicon efficiency predictably and rapidly, while de-coupling the front-end optimization loop and streamlining the back-end optimization loop, enables a more productive RTL design hand-off paradigm. About Tera Systems, Inc. Tera Systems, Inc. is the leader in front-end design planning technologies for use by designers of complex System-on-Chip (SoC) semiconductors. Tera Form is the only front-end design planning solution that enables design hand off. For more information, visit our web site at www.terasystems.com. TeraForm and TeraGate are trademarks of Tera Systems. All other trademarks are the property of their respective owners. |
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