Tensilica Introduces Diamond Standard Processor Core Family, Leading the Industry in Low Power and High Performance.SANTA CLARA, Calif. -- Tensilica(R), Inc. today introduced the Diamond Standard family of processor cores, a set of six off-the-shelf synthesizable cores that range from area-efficient, low-power controllers to high-performance DSPs (Digital Signal Processors), all of which lead the industry in their respective categories both in lowest power and highest performance. The Diamond Standard processors are supported by an optimized set of Diamond Standard software tools and a wide range of industry infrastructure partners (see separate releases). They are available directly from Tensilica and through a growing list of ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and foundry partners (see separate releases).
This announcement provides Tensilica with the broadest range of off-the-shelf processors in the industry, with the six Diamond Standard cores plus an almost infinite number of processor configuration possibilities for those customers requiring optimized, application-specific processors with Tensilica's award-winning Xtensa(R) configurable processor family.
Tensilica is now seeing significant shipments from production volumes in SOCs (systems on chip) in cell phones, printers, and other consumer and communications devices, where its cores serve not only traditional RISC RISC
in full Reduced Instruction Set Computing
Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. controller functions, but often are used as an alternate means of implementing high-performance, low-power compute functions previously implementation only with risky and complex RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; (Register Transfer Level) logic blocks.
The Diamond Standard Processors
The first six members of Tensilica's Diamond Standard processor family cover a wide range of system requirements and includes:
--Diamond 108Mini - an ultra-low power, cacheless RISC controller with rich interrupt architecture and minimal gate count for lowest silicon cost.
--Diamond 212GP - a flexible mid-range RISC controller with instruction/data caches and user selectable local memory sizes, providing 50% better DMIPS DMIPS Dhrystone MIPS (Million Instructions Per Second) performance and 30% lower power than an ARM9.
--Diamond 232L - a flexible mid-range RISC CPU CPU
in full central processing unit
Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. core with full MMU (Memory Management Unit) The part of the computer that governs memory access. Either part of the CPU chip or housed on separate chips, the MMU controls memory partitions and virtual memory. See memory and virtual memory.
MMU - Memory Management Unit (Memory Management Unit) for Linux OS (Operating System) support.
--Diamond 570T - a high-performance 3-issue static superscalar CPU core that beats the ARM11-based systems by more than 2X in EEMBC EEMBC EDN Embedded Microprocessor Benchmark Consortium (Electronic Design News Magazine) benchmarks.
--Diamond 330HiFi - a low power 24-bit audio processor for all popular audio and speech codecs, based on the market-leading Xtensa HiFi 2 Audio Engine.
--Diamond 545CK - the highest performance licensable DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive on the market with a 3-issue VLIW (Very Long Instruction Word) A CPU architecture that reads a group of instructions and executes them at the same time. For example, the group (word) might contain four instructions, and the compiler ensures that those four instructions are not dependent on each (Very Long Instruction Word) processor with an 8-MAC (Multiply ACcumulator), SIMD (Single Instruction stream Multiple Data stream) A computer that performs one operation on multiple sets of data. It is typically used to add or multiply eight or more sets of numbers at the same time for multimedia encoding and rendering as well as scientific (Single Instruction, Multiple Data) DSP.
All of these processor cores are available with Tensilica's Diamond Standard software tool set, including a high-performance optimizing C/C C/C Center to Center
C/C Combustion Chamber
C/C Crew Chief
C/C cabin cruiser (US DoD)
C/C chief complaint (medical)
C/C Communication and Collaboration ++ compiler, instruction set simulator An Instruction Set Simulator (ISS) is a simulation model, usually, but by no means always, coded in a high-level language, which mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's , Eclipse-based graphical development environment, and complete GNU-based tool chain with assembler, debugger, profiler, and linker. An AMBA AMBA Area Metropolitana de Buenos Aires (Spanish)
AMBA Advanced Microcontroller Bus Architecture
AMBA American Mold Builders Association
AMBA American Mustang and Burro Association
AMBA Association of Master of Business Administration bus interface is optional for all cores.
Tensilica has already benchmarked several of these processor cores and received top marks. The Diamond 545CK, based on the Xtensa LX used in the original benchmark, achieved the highest score recorded to date for a licensable processor core on the BDTI BDTI Berkeley Design Technology, Inc.
BDTI Berkeley Design Technology Inc. Benchmarks(tm) by Berkeley Design Technology, Inc. (BDTI). Its BDTIsimMark2000(tm) score of 3490 at 220 MHz is 30 percent faster than the score for the next-fastest licensable core benchmarked by BDTI, the CEVA-X1620.(a) (Note: All BDTI benchmark scores are calibrated to a common silicon process and cell library standard.) Also, the Diamond Standard 545CK is over twice as energy efficient as any other core benchmarked by BDTI to date.
EEBMC benchmark scores for the Diamond 570T far surpassed both the ARM1026EJ-S and the ARM11 class CPUs (Freescale iMX31 implementation with ARM1136J-S J-S Jam-to-Signal Ratio ) in EEMBC's Consumer, Networking, Telecom, and Office Automation tests (see www.eembc.org for full details).
ARM1136JF-S ARM1026EJ-S Diamond (Freescale iMX31) (certified as core) 570T ---------------------------------------------------------------------- NetMARK 1.0 1.29 2.55 ---------------------------------------------------------------------- ConsumerMARK 1.0 1.47 2.91 ---------------------------------------------------------------------- OfficeMARK 1.0 1.19 1.64 ---------------------------------------------------------------------- TeleMARK 1.0 1.06 2.28 ---------------------------------------------------------------------- Geometric Mean 1.0 1.24 2.30 ----------------------------------------------------------------------
The Diamond 570T core delivers 2.3X the performance of the ARM11 in less than half the silicon area. Additionally, the actual benchmark code size of the Diamond 570T is only 80% the amount of code required by the ARM1026EJ-S for the exact same EEMBC algorithms.
New Products Expand Tensilica's Customer Base
Tensilica will expand its customer base with the Diamond Standard processors in two ways. First, because the Diamond Standard processors will be distributed by leading ASIC and foundry providers, Tensilica will be able to reach more potential customers. Second, the customer base should expand because Tensilica offers a better combination of lower price, higher performance and lower power compared to other competing processor cores. The Diamond Standard processors complement Tensilica's existing Xtensa configurable processor product family. Because Diamond Standard cores are based on Tensilica's Xtensa configurable-processor technology, designers using Diamond Standard cores can easily extend the performance of their future designs using Tensilica's Xtensa processor offerings.
"We couldn't have launched this product line several years ago when Tensilica was new and our processor architecture relatively unproven," stated Chris Rowen, Tensilica's president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. . "But now we have over 80 blue-chip customers in many diverse markets, and mainstream designers are asking their ASIC suppliers for Tensilica's processors. The Diamond Standard processors are ideal for this new ASIC and foundry distribution channel. Based on our experience in hundreds of designs, we feel we have predefined these cores to match major market segments."
"Tensilica has made some impressive strides lately," added Tony Massimini, Chief of Technology, Semico Research. "The company's recent design wins portend strong potential growth. Semico foresees healthy growth for embedded cores over the next several years due to consumer and communications markets. Tensilica has been focusing on these high growth markets. Semico believes that embedded cores will grow due to the added functionality offered by configurable cores. Tensilica is one of the companies driving this trend."
Based on Proven Xtensa Architecture
Tensilica's new Diamond Standard processor family is based on its proven Xtensa configurable and extensible processor architecture, used in over 250 chip designs by over 80 customers. Tensilica's engineers used the same Xtensa processor generator technology as its Xtensa processor customers use to create these optimized standard configurations. Tensilica's automated processor generator technology completely verified the configurations and produced the matching software tool chain.
By using the proven Xtensa architecture, customers can be reassured that, if they like one of these Diamond Standard processors but would prefer a more tailored processor solution for their application, they can switch to using Xtensa configurable processors and maintain full software compatibility.
ASIC Partner Support Demanded by Customers
Many ASIC customers prefer the simplicity of purchasing from their ASIC or foundry silicon provider a processor core as part of the NRE (Non-Recurring Engineering) Refers to the cost of creating a new product, which is paid up front. Contrast with "production cost," which is ongoing and based on the quantity of material produced. (Non-Recurring Engineering) expense of their SOC design. Now that Tensilica's Xtensa processor has met with broad success, customers are requesting Tensilica's processors from their ASIC suppliers. That's why these partners were interested in Tensilica's Diamond Standard family. Tensilica has signed up NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).
NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd. Electronics, Global Unichip and SMIC SMIC Salaire Minimum Interprofessionnel de Croissance (French: guaranteed minimum wage)
SMIC Semiconductor Manufacturing International Corp (Shanghai)
SMIC Side Mount Intercooler as its initial ASIC and foundry partners, and the company expects to sign up several other ASIC partners this year. This should significantly expand Tensilica's reach into the mainstream ASIC design community.
A Comprehensive Infrastructure of Tools and Peripheral Support
As detailed in accompanying press releases today, Tensilica is providing a proven infrastructure for its Diamond Standard processor core family. This infrastructure includes software development tools directly from Tensilica (see separate release) as well as:
--Operating system support for Linux from Monta Vista, the Nucleus Plus OS from the Accelerated Technology division of Mentor Graphics, and micro-iTRON from Sophia Systems
--Co-verification support for Mentor's Seamless product
--ICE (in-circuit emulation) from Sophia Systems and Yokogawa Digital Computer
--JTAG probe and Debugging support from Macraigor Systems, Sophia Systems and FS2
--EDA tool support from Synopsys, Cadence and Magma
--The industry's broadest line-up of application packages for audio support of the Diamond Standard 330HiFi.
Pricing and Availability
Tensilica's new Diamond Standard family of processors is available now. Pricing for the Diamond 108Mini starts at $75,000 for a single-use license with 5 cents per core royalty.
Tensilica offers the broadest line of processor cores on the market today, with the six new members of the Diamond Standard processor family plus an infinite number of Xtensa configurable processor possibilities for customers requiring optimized, application-specific solutions. Tensilica's low-power, benchmark-proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. Tensilica also provides industry leading automated tool support for its processor families. For more information, visit www.tensilica.com.
(a) The BDTIsimMark2000(TM) provides a summary measure of DSP speed. For more information and scores see www.BDTI.com. Scores (C) 2006 BDTI.
--Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
--Tensilica's announced licensees include Agilent, ALPS, AMCC AMCC Applied Micro Circuits Corporation
AMCC Air Mobility Control Center
AMCC Ashore Mobile Contingency Communications
AMCC Advanced Materials Commercialization Center
AMCC allied movement coordination center (US DoD) (JNI (Java Native Interface) A programming interface (API) in Sun's Java Virtual Machine used for calling native platform elements such as GUI routines. RNI (Raw Native Interface) is the JNI counterpart in Microsoft's Java Virtual Machine.
JNI - Java Native Interface Corporation), Astute Networks, Atheros, ATI (ATI Technologies Inc., Markham Ontario, http://ati.amd.com) A leading manufacturer of graphics chips and display adapters. Founded in 1985 by K. Y. Ho, Benny Lau and Lee Lau, ATI chips and boards are widely used by OEMs. , Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI ETRI Electronics & Telecommunications Research Institute (Korea)
ETRI Enhanced Threat Reduction Initiative
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NTT New Technology Telescope
NTT National Technology Transfer, Inc
NTT Name That Tune (TV game show)
NTT National Tree Trust
NTT Number Theoretic Transform ), NVIDIA, Olympus Optical Co. Ltd., sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics, and Victor Company of Japan (JVC JVC Victor Company of Japan (or Japan's Victor Company)
JVC Jewelers Vigilance Committee
JVC Jesuit Volunteer Corps
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