Tensilica Flow for Diamond Standard Processor Cores Employs Synopsys SoC Design and Verification Platforms.MOUNTAIN VIEW, Calif. & SANTA CLARA, Calif. -- Synopsys, Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ), a world leader in semiconductor design software, and Tensilica(R), Inc. today announced the availability of a predictable RTL-to-GDSII design flow for Tensilica's new Diamond Standard processor family based on Synopsys' Galaxy(TM) Design and Discovery(TM) Verification Platforms. The Diamond Standard processor family includes six cores, ranging from a low-power 32-bit controller to a high performance DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive . The combination of Synopsys solutions with Tensilica's processors and design methodology enables improved time-to-market for complex system-on-chip (SoC) designs.
"This Tensilica design methodology, based on the widely used Synopsys design implementation and verification tools, allows designers to quickly integrate the Diamond Standard cores into their SoCs while meeting all process technology requirements. This helps deliver high-quality devices to market sooner," said Lonn Fiance, director of Strategic Alliances at Synopsys. "The Diamond Standard core family spans a range of power and performance points, making it appropriate for numerous SoC applications."
The Diamond Standard processor reference design flow for Synopsys includes the following products: Design Compiler(R) RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; synthesis, Power Compiler(TM) power optimization, DFT DFT - discrete Fourier transform Compiler test synthesis, Physical Compiler(R) physical synthesis, Astro(TM) place-and-route, PrimeTime(R) timing analysis, and VCS (1) (Verilog Computer Simulator) See Verilog.
(2) (Version Control System) See version control. (R) RTL verification solution. The reference flow can be used to design chips that can be manufactured at all major semiconductor foundries.
"Our Diamond Standard core family and Synopsys' IC design and verification solutions, deliver proven solutions to our mutual customers," stated Larry Przywara, Tensilica's director of strategic alliances. "The design methodology makes integrating our new cores into existing and new designs both fast and predictable, because all of the key design steps are addressed."
The reference flow for the Diamond Standard core family is available from Tensilica today.
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California For the census-designated place, see Mountain View, Contra Costa County, California. For other places called "Mountain View", see .
Mountain View is a city in Santa Clara County, in the U.S. state of California. The city gets its name from the views of the Santa Cruz Mountains. and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at www.synopsys.com.
Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor and DSP solutions in high-volume embedded applications. Using a patented configurable and extensible processor generation technology, Tensilica is the only company that offers a wide range of controller, CPU CPU
in full central processing unit
Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. and specialty DSP processors in both off-the-shelf format via the Diamond Standard series cores, and with full designer-configurability with the Xtensa processor family. Every Tensilica processor core comes complete with a companion software development tool environment, portfolio of system simulation models, and hardware implementation tool support. For more information on Tensilica's patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.
--Tensilica and Xtensa are registered trademarks belonging to Tensilica, Inc. Synopsys, the Synopsys logo, Design Compiler, DesignWare, Formality, HSPICE, NanoSim, Physical Compiler, PrimeTime, and VCS are registered trademarks of Synopsys, Inc. Astro, JupiterXT, Power Compiler, Star-RCXT, Discovery and Galaxy are trademarks of Synopsys. All other company and product names are trademarks and/or registered trademarks of their respective owners.
--Tensilica's announced licensees include ALPS, AMCC AMCC Applied Micro Circuits Corporation
AMCC Air Mobility Control Center
AMCC Ashore Mobile Contingency Communications
AMCC Advanced Materials Commercialization Center
AMCC allied movement coordination center (US DoD) (JNI (Java Native Interface) A programming interface (API) in Sun's Java Virtual Machine used for calling native platform elements such as GUI routines. RNI (Raw Native Interface) is the JNI counterpart in Microsoft's Java Virtual Machine.
JNI - Java Native Interface Corporation), Astute Networks, Atheros, ATI, Avago Technologies, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI ETRI Electronics & Telecommunications Research Institute (Korea)
ETRI Enhanced Threat Reduction Initiative
ETRI Electronics Telecommunication Research Inc. , FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems Hughes Network Systems, LLC (HNS), is a provider of broadband satellite network products for businesses and consumers. HNS pioneered the development of high-speed satellite Internet access services and IP-based networks with its original DirecPC service but which it now markets , Ikanos Communications, LG Electronics, Marvell, NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).
NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd. Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Corporation, sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics and Victor Company of Japan (JVC).