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Tensilica Announces Industry's Highest Performance, Most Energy Efficient DSP Core; Diamond Standard 545CK Gets Highest Score on BDTI Benchmarks.


SANTA CLARA, Calif. -- Tensilica(R), Inc. today introduced the industry's highest performance licensable DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  core, the Diamond Standard 545CK processor. The Diamond Standard 545CK synthesizable processor core received the highest score recorded to date for a licensable processor core on the BDTI BDTI Berkeley Design Technology, Inc.
BDTI Berkeley Design Technology Inc.
 Benchmarks(TM) by Berkeley Design Technology, Inc. (BDTI). Its BDTIsimMark2000(TM) score of 3490 at 220 MHz is 30 percent faster than the score for the next-fastest licensable core benchmarked by BDTI, the CEVA-X1620.(1) Also, the Diamond Standard 545CK is over twice as energy efficient as any other core benchmarked by BDTI to date.(2)

"The Diamond Series 545CK sets a new standard for DSPs, with the highest performance ever recorded on the BDTI Benchmarks for a licensable core," stated Steve Roddy, Tensilica's vice president of marketing. "Because it also is the most energy efficient DSP core, it is ideal for handheld applications."

The Diamond Standard 545CK is a high-performance VLIW (Very Long Instruction Word) A CPU architecture that reads a group of instructions and executes them at the same time. For example, the group (word) might contain four instructions, and the compiler ensures that those four instructions are not dependent on each  (very long instruction word) DSP that features modeless scalar and VLIW instruction mixing. It uses 64-bit VLIW instructions with 3 issues per cycles. It employs compact Xtensa 16/24-bit instruction coding when multi-issue instructions

cannot be scheduled to keep code size to a minimum. Eight 16-bit multipliers can operate in SIMD (Single Instruction stream Multiple Data stream) A computer that performs one operation on multiple sets of data. It is typically used to add or multiply eight or more sets of numbers at the same time for multimedia encoding and rendering as well as scientific  (single instruction, multiple data) mode with 16-entry, 160-bit wide vector registers. A Viterbi accelerator is designed in for communications baseband applications.

Most Energy Efficient DSP Core

The Diamond Standard 545CK achieved a BDTIsimMark2000(TM) per-mW score of 80. This is over twice as energy efficient as any other core benchmarked by BDTI to date.

Strong DSP Function Library

The Xtensa(R) Xplorer(TM) Diamond Edition (DE) software development toolkit contains a number of source files for various common DSP functions. These DSP function examples include documentation, assembly and C source to allow rapid DSP code development when using Tensilica's Diamond Standard 545CK and software development environment. The provided libraries include complex 1-d FFT (Fast Fourier Transform) A class of algorithms used in digital signal processing that break down complex signals into elementary components.

FFT - Fast Fourier Transform
, 8th order IIR IIR - Infinite Impulse Response  filter, LMS filter, Real Block FIR filter and one sample FIR filter.

Based on Proven Xtensa ISA (1) (Instruction Set Architecture) See instruction set.

(2) (Interactive Services Association) See Internet Alliance.

(3) (Internet Security and Acceleration) See .NET.
 

The entire Diamond Standard family is based on Tensilica's proven Xtensa processor architecture, a post-RISC-style architecture with native 32-bit data types (operands and ALUs) for the baseline 80+ instructions. Compact 24-bit/16-bit instruction encoding reduces power consumption and produces 25 to 50 percent smaller code (better code density) than standard 32-bit architectures. Register windows for efficient procedure switches provide high performance with low power. The base Xtensa ISA also provides powerful branch instructions and complex bit manipulations.

Architecture Optimized for C-Code and Compilation

The Diamond 545CK is fully C-programmable utilizing Tensilica's advanced XCC XCC XML Commerce Connector (Commerce One, Inc.)
XCC Expansion Cross-Connect (Module; Eastern Research)
XCC Cross Country Competition
XCC X.25 Control Center
XCC X25 Control Center
 compiler technology. The XCC compiler automatically analyzes and vectorizes C source code with no user intervention. Additionally, the compiler produces 16/24 and 64-bit VLIW instructions through analysis of source code. All 16, 24 and 64-bit instructions can be freely intermixed in the instruction stream, and the processor automatically mode-switches between instructions of different lengths.

Industry Leading I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 Bandwidth

The Diamond 545CK also provides industry leading I/O (input/output) bandwidth. Dual 128-bit load/store units deliver eight times the I/O bandwidth of conventional 16-bit XY-style DSPs or 32-bit RISC-style CPUs. And Tensilica's industry-first streaming data queue interfaces provide an additional 32-bit data flow input queue and separate 32-bit output queue that operate under program control but without conventional load and store operations. This allows the Diamond 545CK to sustain continuous data movement operations within an SOC's (System On Chip) application data plane while simultaneously performing computations.

Availability

Tensilica's new Diamond Standard family of processors is available now, either direct from Tensilica or from a roster of ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  and foundry partners also announced today. See separate press releases or go to www.tensilica.com for more details.

About Tensilica

Tensilica offers the broadest line of processor cores on the market today, with the six new members of the Diamond Standard processor family plus an infinite number of Xtensa configurable processor possibilities for customers requiring optimized, application-specific solutions. Tensilica's low-power, benchmark-proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. Tensilica also provides industry leading automated tool support for its processor families. For more information, visit www.tensilica.com.

(1) The BDTIsimMark2000(TM) provides a summary measure of DSP speed. All scores use worst-case clock speeds for the TSMC TSMC Taiwan Semiconductor Manufacturing Company, Ltd
TSMC Taiwan Semiconductor Manufacturing Corporation
TSMC Traffic Systems Management Center
TSMC Toll Station Management Controller
TSMC Transportation Supply Maintenance Command
TSMC Technical Services Manager Code
 CL013G process and ARM Artisan SAGE-X library. For more information and scores see www.BDTI.com. Scores (C) 2006 BDTI.

(2) The Diamond 545CK tested consumes a static leakage power of 0.7 mW plus dynamic switching power of 0.2 mW/MHz on a representative computational benchmark kernel under typical operating conditions.

Editors' Notes:

--Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.

--Tensilica's announced licensees include Agilent, ALPS, AMCC AMCC Applied Micro Circuits Corporation
AMCC Air Mobility Control Center
AMCC Ashore Mobile Contingency Communications
AMCC Advanced Materials Commercialization Center
AMCC allied movement coordination center (US DoD) 
 (JNI Corporation), Astute Networks, Atheros, ATI, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI ETRI Electronics & Telecommunications Research Institute (Korea)
ETRI Enhanced Threat Reduction Initiative
ETRI Electronics Telecommunication Research Inc.
, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems Hughes Network Systems, LLC (HNS), is a provider of broadband satellite network products for businesses and consumers. HNS pioneered the development of high-speed satellite Internet access services and IP-based networks with its original DirecPC service but which it now markets , Ikanos Communications, LG Electronics, Marvell, MediaWorks, NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).

NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd.
 Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics, and Victor Company of Japan (JVC).
COPYRIGHT 2006 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2006, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Feb 21, 2006
Words:881
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