TRADE NEWS: Agilent Technologies Improves Surface-Mount Technology Manufacturing Yields with New Inspection System.Business Editors/High Tech Writers PALO ALTO, Calif.--(BUSINESS WIRE)--Jan. 21, 2002 Agilent Solder-Paste Inspection System for Printed Circuit Board Assembly Expected to Improve Product Yields Agilent Technologies Inc. (NYSE NYSE See: New York Stock Exchange :A) today introduced a new solder-paste inspection system for printed circuit board assembly. The Agilent SP50 automated optical inspection Automated Optical Inspection (AOI) is an automated visual inspection of PCB(or LCD,transistor manufacture) where a camera autonomously scans the device under test for both catastrophic failure (eg. missing component) and quality defects (eg. (AOI AOI Area Of Interest AOI Automated Optical Inspection AOI Art of Illusion (3D modeling software) AOI Associated Oregon Industries AOI Angle Of Incidence AOI Age of Innocence (David Hamilton book, also a band) ) system for surface-mount technology (SMT (1) (Surface Mount Technology) See surface mount. (2) (Station ManagemenT) An FDDI network management protocol that provides direct management. Only one node requires the software. SMT - Station Management ) electronics production is expected to improve product yields throughout the manufacturing process. "With increased density of components and advanced area array devices on printed circuit boards, correct solder-paste application is an increasingly critical production step," said Kamran Firooz, vice president and general manager of Agilent's Manufacturing Test Business Unit. "Our newest entry to Agilent's Intelligent Test portfolio accurately inspects solder-paste deposits to the most demanding requirements, and still beats the cycle rate of most production lines." Solder-paste printing is the first critical process in the SMT production line. The growing use of chip-scale packages (CSPs), micro-ball-grid arrays (uBGAs) and nearly microscopic 0201 components have made process control and verification of screen printing more critical. Several industry studies indicate that defects in the end product are often related to paste-printing problems(1). Reliably detecting paste defects early in the manufacturing process significantly improves process yields at the least possible cost, because, at this point in the process, rework time is minimized and minimum investment has been made in the board. The Agilent SP50 is a high-speed, inline solder-paste inspection system that produces accurate and repeatable measurements of pad offset and skew, solder-paste area, height and volume. The SP50 also allows statistical process control output. It identifies precise location of paste defects such as insufficient area or height, and missing, smeared or bridged deposits. A combination of proprietary new hardware and software allows the new SP50 to make accurate, 3D measurements of 100 percent of solder deposits on the board. Its speed of 3 square inches per second means it functions well at inline beat rates of most production lines. The entire board is continuously imaged by raster scan, in one operation. The SP50 automatically compensates for +/- 5 mm of warp in the bare PC board. Easy, user-friendly programming allows programs to be developed in an hour or less. The SP50 system hardware is based on the market-proven SJ50 pre- and post-reflow AOI platform that has an excellent reliability record and requires little calibration or maintenance. U.S. Pricing and Availability The Agilent SP50 is expected to ship in May of 2002. More information is available through any Agilent sales representative or by calling 1-866-283-8378 (1-866-ATE-TEST). About Agilent Technologies Agilent Technologies Inc. (NYSE: A) is a global technology leader in communications, electronics and life sciences. The company's 41,000 employees serve customers in more than 120 countries. Agilent had net revenue of $8.4 billion in fiscal year 2001. Information about Agilent is available on the Web at www.agilent.com. This news release contains forward-looking statements (including, without limitation, statements relating to the Agilent SP50 automated optical inspection system's ability to improve product yields) that involve risks and uncertainties that could cause results of Agilent Technologies to differ materially from management's current expectations. These risks are detailed in Agilent's Annual Report on Form 10-K Form 10-K A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information. Form 10-K See 10-K. for the year ended Oct. 31, 2000, Quarterly Report on Form 10-Q Form 10-Q See 10-Q. for the quarter ended July 31, 2001, and Current Report on Form 8-K filed Nov. 27, 2001. (1) Burr, Donald, "Printing Guidelines for BGA (Ball Grid Array) A popular surface mount chip package that uses a grid of solder balls as its connectors. Available in plastic and ceramic varieties, BGA is noted for its compact size, high lead count and low inductance, which allows lower voltages to be used. and CSP (1) (Certified Systems Professional) An earlier award for successful completion of an ICCP examination in systems development. See ICCP. (2) (Commerce Service P Assemblies," SMI (1) (Storage Management Initiative) The initiative developed by the SNIA in 2003 to create a single standard interface for storage management technologies used by multiple vendors and networking communities. '98, pp. 417-424. Clech, Jean-Paul, "Flip-Chip/CSP Assembly Reliability and Solder Volume Effects," SMI '98, pp. 315-323. Partridge, Julian and Rick Gunn, "Paste Printing and Characterization for Chip Scale Package A chip scale package (CSP) (sometimes, chip-scale package with a hyphen) is a type of integrated circuit chip carrier. According to the IPC, to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die that is being packaged. Assemblies," SMI '98, pp. 405-424. Stereian, I. et al., "Compatibility of CSPs in SMT Assembly," SMI '98, pp. 225-230. Buttars, Scott, "Stencil Printing Principles and Parameters Principles and parameters is a framework in generative linguistics. Principles and parameters was largely formulated by the linguists Noam Chomsky and Howard Lasnik, though it was the culmination of the research of many linguists. ," Future Circuits International, Issue 1 Volume 2, 1997, pp. 159-164. |
|
||||||||||||||||
Printer friendly
Cite/link
Email
Feedback
Reader Opinion