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TOSHIBA'S 288Mb RDRAM FEATURES COST-EFFICIENT MULTIPLE-BANK ARCHITECTURE.


Toshiba America Electronic Components Inc. (TAEC TAEC Toshiba America Electronic Components, Inc.
TAEC Thailand Atomic Energy Commission
) announced that Toshiba Corp. unveiled a new architecture for its 288Mb megabit One million bits. Also Mb, Mbit and M-bit. See mega and space/time.  (Mb) Rambus dynamic random access memory Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an integrated circuit. Since real capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically.  (RDRAM (Rambus DRAM) Pronounced "r-d-ram." A dynamic RAM chip technology from Rambus, Inc., Los Altos, CA (www.rambus.com). Rambus licensed its memory designs to semiconductor companies, which manufactured the chips. ) at the International Solid State Circuits Conference.

The new architecture requires less silicon area overhead than a comparable 288Mb RDRAM created by expanding the conventional architecture used for today's 144Mb RDRAM design, resulting in an eight percent smaller die size.

The new design archives multiple bank performance with a small area overhead and includes two built-in page sizes in one chip to ensure suitability for applications ranging from low-end computers to high-end workstations.

Toshiba's 288Mb RDRAMs are produced on a 0.175-micron (mu)m process, and are scheduled to be available during second quarter, 2000. The architecture uses four 72Mb quadrants and shares data transmission circuitry among all banks to achieve a small die size of 131 millimeters squared (mm2).

With built-in page sizes of 1 kilobyte (thousand bytes). For technical specifications, it refers to 1,024 bytes. In general usage, it typically refers to an even one thousand bytes (see kilo). Also KB, Kbyte and K-byte. See space/time.

(unit) kilobyte - (KB) 2^10 = 1024 bytes.

See prefix.
 (kB) for low-end computers with low power requirements and 2kB for high-end computers and workstations, the device is suitable for a wide range of computing computing - computer  applications.

"As a result of this new architecture, combined with our trench memory cell design and our advanced 0.275 (mu)m Scalable by Design process, Toshiba's 256/288Mb RDRAM die are expected to be the smallest on the market, enabling us to achieve excellent production efficiencies," says Jamie Stitt, business development manager, Memory Business Unit at TAEC.
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Title Annotation:Company Business and Marketing
Comment:TOSHIBA'S 288Mb RDRAM FEATURES COST-EFFICIENT MULTIPLE-BANK ARCHITECTURE.(Company Business and Marketing)
Publication:EDP Weekly's IT Monitor
Article Type:Brief Article
Geographic Code:9JAPA
Date:Feb 14, 2000
Words:235
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