TEL Announces Major Improvements in Plasma Etch Chamber Design That Significantly Improve Throughput and Yield.

AUSTIN, Texas -- Tokyo Electron (TEL) today announced a significant improvement in the design of their SCCM (Super Capacitively Coupled Module) chamber. The focus ring and supporting parts have been redesigned to greatly reduce and possibly eliminate the deposition of backside polymer at the wafer edge and bottom.

This chamber modification improves the tool's throughput by eliminating the processing time dedicated to backside polymer removal. In addition to throughput, yield performance is enhanced, since backside polymer and other various removal processes potentially damage the underlying circuits.

Backside polymer deposition during Plasma Etch processes went unnoticed for years due to the use of post processing techniques. The recent switch in dielectric films from FSG (Flourosilicated Glass) and BPSG (Boron Phosphorous Silicated Glass) to OSG (Organosilicated Glass) has brought this issue to the forefront. With previous films, the backside polymer was generally ignored because the High Temperature O2 intensive Ashing process that followed etching promptly removed the polymer. With OSG films, which contain Carbon, these ashing processes cannot be used due to the concern that they will extract the Carbon from the OSG film and thus increase k value, thereby reducing performance. Ashing processes have now switched to chemistries, such as N2 or N2/H2, but these are not always sufficient to remove Backside Polymer. Therefore, other means, such as backside scrubbers, must be considered. These additional tools and time significantly impact the cost, throughput and even the yield for a large fab.

"Customers have told us that this problem is affecting their bottom line and we have responded with a solution that eliminates backside polymer," said Takashi Ito, TEL vice president & general manager of Etch Systems Business Unit. "We believe the advances we have recently made to chamber design will significantly and immediately improve their low-k etch performance."

TEL developed this new technology at their Process Technology Center in Yamanashi, Japan. This premiere 300mm facility is fully capable of producing a finished 300mm wafer that can be tested and utilized for tool development.

TEL plans on releasing other significant improvements to their plasma chambers in the coming year that will impact the speed and technological capabilities of their plasma etch chambers.

About TEL

TEL, established in 1963, is a leading supplier of innovative semiconductor and FPD production equipment worldwide. In Japan, TEL also distributes computer network related products and electronic components of global leading suppliers. To support this diverse product base, TEL has strategically located around the world. TEL is a publicly held company listed on the Tokyo Stock Exchange. www.tel.com