TAEC Introduces EDRAM Core With 12-ns Access Time for SRAM Replacement; New ASIC Capability Delivers Fastest Access Time in 0.18-um CMOS.Business Editors/High-Tech Writers SAN JOSE, Calif.--(BUSINESS WIRE)--Aug. 29, 2001 Company Further Augments ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. Library With New SerDes I/Os, ARM-9 and MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. Cores Toshiba America Electronic Components, Inc. (TAEC TAEC Toshiba America Electronic Components, Inc. TAEC Thailand Atomic Energy Commission ) today announced that its fast access embedded dynamic random access memory Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an integrated circuit. Since real capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically. (FADRAM) core with an access time of 12-nanoseconds (ns) and a typical latency of 1 clock cycle has been silicon validated for use with the company's TC260 technology library for application specific integrated circuits (ASICs). The access time was measured using a 4-megabit (Mb) core; smaller cores can produce faster access times. TAEC also announced availability of five new high-speed SerDes (Serializer/Deserializer) input/output (I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output ) macros, production-proven MIPS(R) RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. 64-bit and 32-bit processor cores and the ARM(R)9 46E-S processor core. The FADRAM core is ideal for power-sensitive, high-speed networking and data-communications applications that otherwise would rely upon embedded static random access memory Static random access memory (SRAM) is a type of semiconductor memory. The word "static" indicates that the memory retains its contents as long as power remains applied, unlike dynamic RAM (DRAM) that needs to be periodically refreshed (nevertheless, SRAM should not be confused with (SRAM See static RAM. SRAM - static random-access memory ), which can consume four times the silicon territory and much greater power. "ASIC designers who design chips for such applications as high-speed packet-processing can now increase on-chip fast-access memory yet still stay below their power budgets by using Toshiba's FADRAM instead of SRAM cores," said Peter Richmond, business development director, system IC business unit. "Our 3.125 gigabits/second (Gb/s) SerDes I/O macros also reduce power and pin count in chip-to-chip and backplane interfaces." There are three SerDes macros for asynchronous I/O and two for synchronous I/O, including one for direct optical interface that supports SONET applications. The TC260 product family is based upon Toshiba's 0.18-micron (0.14-micron drawn gate) CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. process, which enables the fabrication of very dense, high-performance embedded DRAM without compromising the performance of on-chip logic. TAEC also offers a TC280 0.13-micron (0.11-micron drawn gate) technology. Said Richmond, "By offering the widest 0.18-micron library of performance cores together with complete ASIC capabilities and its own manufacturing, TAEC can assure that ASIC designers get manufacturable chips out on time without compromising their target specs." About TAEC Toshiba America Electronic Components, Inc. (TAEC) offers the industry's broadest lineup of semiconductor, display and storage solutions for the computing, wireless, networking and digital consumer markets. Combining quality and flexibility with design engineering expertise, TAEC brings advanced next-generation technologies to its OEM customers. TAEC is an independent operating company owned by Toshiba America Inc., itself a subsidiary of the $54 billion (FY 1999 recorded sales) Toshiba Corp. Toshiba Corp. is a world leader in high-technology products with more than 300 major subsidiaries and affiliates worldwide. For additional company and product information, visit TAEC's website at chips.toshiba.com. Note to Editors: MIPS is a registered trademark of MIPS Technologies, Inc. and ARM is a registered trademark of ARM Limited. |
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