SystemVerilog NOW! Technical Seminars to Be Offered across North America.
Business Editors/High-Tech Writers
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 23, 2003
Industry Leaders Axis Systems, Mentor Graphics, Novas Software and
Synopsys to Sponsor Technical Sessions to Demonstrate Immediate
Benefits to Using SystemVerilog
Four leaders in advanced design and verification technologies -- Axis Systems, Mentor Graphics (Nasdaq:MENT), Novas Software and Synopsys (Nasdaq:SNPS SNPS Space Nuclear Power System ), with the support of HP's platform technology -- are sponsoring a free SystemVerilog technical seminar and product demonstrations in four North American locations beginning October 8, 2003. Each seminar will be presented by noted Verilog design expert Cliff Cummings, president of Sunburst Design, Inc.
The SystemVerilog NOW! technical seminars will provide design and verification engineers with practical and up-to-date information about SystemVerilog's capabilities and demonstrate how they translate into increased productivity and silicon success using design and verification tools that support SystemVerilog today.
"The power of Axis' RCC RCC - An extensible language. (ReConfigurable Computing) technology is demonstrated again with our ability to support SystemVerilog," said Steve Wang, co-founder, Axis Systems. "Based on customer demand, Axis will provide the ability to leverage SystemVerilog constructs to accelerate testbench and assertions in our foremost Design Team Emulation products."
"The single largest design bottleneck electronics designers face today is design verification. Mentor Graphics has a strong history of supporting open and public standards which permit design teams to craft methodologies that utilize a broad range of verification solutions to solve this critical issue," said Robert Hum, vice president and general manager of Mentor's Design Verification and Test division. "SystemVerilog, an emerging open and public standard, offers a comprehensive foundation to improve the overall verification process to help alleviate issues with design complexity for the Verilog user."
"SystemVerilog holds great promise for methodology improvement across a range of applications," said Scott Sandler, President & CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. , Novas Software, Inc. "Driven by our customers requests for a universal debug platform for design, testbench and assertion languages, Novas has extended its debug automation technology to support SystemVerilog models, allowing for the fast detection and repair of complex issues in designs that leverage these powerful language capabilities."
"Synopsys is delivering a unified design and verification platform based on SystemVerilog to enable a comprehensive design-for-verification methodology, leveraging SystemVerilog's advanced language capabilities for more concise RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; design and comprehensive assertions, and testbench features for streamlined verification," said Manoj Gandhi, senior vice president and general manager, Verification Group at Synopsys. "The SystemVerilog standard offers both the right technology and the broad industry acceptance needed to accelerate design and verification processes, while offering greater certainty of silicon success."
Verilog language extensions will be presented in a designer-centric fashion by Cliff Cummings, one of the world's leading Verilog experts. This highly technical event will demonstrate how SystemVerilog can be practically used with immediate benefit to improve design engineering productivity, speed verification and deliver smarter verification.
Seminar Schedule and Locations
The SystemVerilog NOW! technical seminar dates and locations are:
October 8 - Austin, Texas
October 22 - Santa Clara, California Santa Clara, California (IPA: /ˌsæntəˈklærə/) , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California.
October 29 - Boston, Massachusetts
November 12 - Ottawa, Canada
To register for the SystemVerilog NOW! technical seminar, please visit http://www.systemverilognow.com.
SystemVerilog, the first hardware description and verification language (HDVL HDVL Hab Dich Voll Lieb (German) ), is an extension to the IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 1364-2001 Verilog HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. and offers advanced design features to tackle the most complex next-generation designs, provides comprehensive testbench and assertions capabilities for integrated high performance verification and offers a designer-friendly direct programming interface for efficient interaction with C/C C/C Center to Center
C/C Combustion Chamber
C/C Crew Chief
C/C cabin cruiser (US DoD)
C/C chief complaint (medical)
C/C Communication and Collaboration ++ models, code and algorithms. For more information about SystemVerilog, visit http://www.systemverilog.org.
About Cliff Cummings
Cliff Cummings is President of Sunburst Design, Inc., a company that specializes in Verilog, Verilog RTL synthesis and SystemVerilog training. Mr. Cummings is an independent consultant and recognized Verilog expert with 21 years of ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. , FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. , system design and verification experience and 11 years of Verilog, synthesis, SystemVerilog and methodology training experience. He has co-authored all five IEEE and Accellera, Verilog and SystemVerilog standards, and has also presented 32 conference papers, including 13 that were voted "Best Paper." Mr. Cummings holds a BSEE BSEE
Bachelor of Science in Electrical Engineering from Brigham Young University Brigham Young University, at Provo, Utah; Latter-Day Saints; coeducational; opened as an academy in 1875 and became a university in 1903. It is noted for its law and business schools. and an MSEE MSEE Master of Science in Electrical Engineering
MSEE Mean Square Estimation Error
MSEE Major Source Enforcement Effort
MSEE Materials Science and Electrical Engineering (Purdue University building) from Oregon State University Oregon State University, at Corvallis; land-grant and state supported; coeducational; chartered 1858 as Corvallis College, opened 1865. In 1868 it was designated Oregon's land-grant agricultural college and was taken over completely by the state in 1885. . Mr. Cummings can be contacted at 14314 SW Allen Blvd., PMB PMB Private Message Board
PMB Print Measurement Bureau
PMB Performance Measurement Baseline
PMB Private Mail Box (non-USPS)
PMB Plant and Microbial Biology
PMB Private Mailbox
PMB Physics in Medicine and Biology 501, Beaverton, OR 97005; 503-641-8446 or firstname.lastname@example.org.
About Axis Systems
Axis Systems, Inc., offers high-performance verification platforms for the hardware and software development of complex electronic system and system-on-a-chip designs. Axis' products help increase confidence in new designs, improve overall verification productivity and shorten time to market. On a single platform and with one design database, Axis' patented ReConfigurable Computing (RCC) technology provides software simulation, accelerated simulation, system emulation and hardware/software co-verification. Customers include the world's leading networking and multimedia companies. Axis is headquartered at 209 E. Java Drive, Sunnyvale, CA 94089. To learn more about Axis, visit www.axissystems.com.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support of the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $650 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County. 95131-2314. World Wide Web: http://www.mentor.com.
About Novas Software
Novas Software, Inc. is the pioneer of debug systems that reduce the functional verification costs for complex IC designs. Building upon the strength of its market-leading Debussy(R) Debug System, Novas' Verdi(TM) Behavior-Based Debug System further improves the efficiency of designers in the system-on-chip era with advanced design exploration and automated debug capabilities. These allow design teams to better understand and analyze complex or unfamiliar design behavior, and cut by half or more the time it takes to locate, and solve the root causes of design problems. With more than 10,000 systems in use today worldwide, Novas has for two consecutive years received the highest ranking for customer satisfaction in a comprehensive EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. study published by CMP CMP (cytidine monophosphate): see cytosine.
(1) (CMP Media LLC, Manhasset, NY, www.cmp.com) Part of United Business Media, CMP is a leading integrated media company that offers a wide variety of publications and services in the information . Novas is headquartered in San Jose, Calif. with offices in Europe, Japan and Asia-Pacific. For more information, visit www.novas.com or send email to email@example.com.
Synopsys, Inc. (Nasdaq: SNPS) is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California For the census-designated place, see Mountain View, Contra Costa County, California. For other places called "Mountain View", see .
Mountain View is a city in Santa Clara County, in the U.S. state of California. The city gets its name from the views of the Santa Cruz Mountains. and is located more than 60 offices throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com.
Xtreme, Xcite and Xsim are registered trademarks and XoC, Xpert and Xchange are trademarks of Axis Systems, Inc. Mentor Graphics is a registered trademark of Mentor Graphics Corporation. Debussy is a registered trademark and Verdi is a trademark of Novas Software, Inc. Synopsys is a registered trademark of Synopsys, Inc. All other products mentioned in this release are the intellectual property of their respective owners.