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Synplicity Delivers Synthesis Tool for NEC Electronics' Gate Array Products.


Business Editors/High-Tech Writers

SUNNYVALE, Calif. & TOKYO--(BUSINESS WIRE)--June 14, 2004

Synplicity's Synthesis Technology Enables Lower Design Costs and

Faster Time to Market for NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).

NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd.
 Electronics' Gate Arrays

Synplicity Inc. (Nasdaq:SYNP SYNP Synchronization Profile ), a leading supplier of software for the design and verification of semiconductors, today announced the availability of a version of its Synplify ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. (R) software specifically targeting NEC Electronics' Gate Array products. The Synplify ASIC for NEC Electronics Gate Array software is a single-vendor version of the Synplify ASIC software that enables customers to achieve optimal results for their NEC Electronics Gate Array design, while taking advantage of low design tool costs, best-in-class runtime and performance, and design migration benefits. NEC Electronics' Gate Array customers have production support in both the standard, all-vendor version of the Synplify ASIC product, as well as in the single-vendor Synplify ASIC for NEC Electronics Gate Array product. NEC Electronics has performed full qualification testing for the Synplify ASIC products and has design support available immediately through its OpenCAD design environment.

"The low NRE (Non-Recurring Engineering) Refers to the cost of creating a new product, which is paid up front. Contrast with "production cost," which is ongoing and based on the quantity of material produced.  costs of a gate array previously were encumbered Encumbered

A property owned by one party on which a second party reserves the right to make a valid claim, e.g., a bank's holding of a home mortgage encumbers property.
 with the high tool costs of traditional cell-based design tools. The availability of a dedicated product for gate array synthesis solves a real customer dilemma. By working with Synplicity, we have removed this barrier for both new and existing gate array customers," said Yutaka Hayashi, general manager, Platform LSI LSI: see integrated circuit.


(Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI.
 Division, NEC Electronics Corporation. "We have found Synplicity to be a good development partner who shares our vision of making the ASIC design process faster, more automated and less expensive for our customers."

"NEC Electronics has been the worldwide leader in gate array sales since 1993," said John Gallagher John Gallagher may be:
  • John Gallagher (geologist) (born 1916)
  • John Gallagher (cartoonist)
  • John Gallagher (rugby player) (born 1964)
  • John Gallagher (hockey)
  • John Gallagher (golfer)
  • John Gallagher (artist)
  • John Gallagher (Dying Fetus)
, director of ASIC product marketing at Synplicity. "With this single-vendor version of the Synplify ASIC software, we believe we are able to significantly reduce design costs, human resources The fancy word for "people." The human resources department within an organization, years ago known as the "personnel department," manages the administrative aspects of the employees.  and cycle times for NEC Electronics' Gate Array customers who use Synplicity's technology. In addition to the Synplify ASIC software's overall performance advantages, we expect this single-vendor version to reduce design tool costs and provide more flexibility in licensing terms for gate array designs. Working in concert with NEC Electronics over the past two years, we have delivered significant improvements to the ASIC design flow, including the Amplify(R) ISSP ISSP Institute for Solid State Physics (University of Tokyo)
ISSP International Social Survey Programme
ISSP Intensive Supervision and Surveillance Programme (UK)
ISSP International Space Station Program
 software for structured ASIC A type of application specific IC (ASIC) chip that contains blocks of logic, called "tiles" or "modules," that have their transistors already wired together forming gates along with some combination of multiplexors, flip/flops, look up tables and the like.  physical synthesis. With this latest offering, we continue to demonstrate our commitment to NEC Electronics' customers."

Complete Gate Array Synthesis Solution

The Synplify ASIC for NEC Electronics Gate Array software contains the complete feature set of the standard version of the Synplify ASIC software, including production-proven capabilities such as power optimization (automatic clock gating), advanced module generators, graphical debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  (HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards.  Analyst(TM)) and one-pass test insertion. With Synplicity's ASIC synthesis products, all features are bundled into a single license and are supported on all major platforms.

Availability

Special introductory pricing and licensing terms for the Synplify ASIC for NEC Electronics Gate Array software are available now through Synplicity, which includes a special six-month license. Contact your local NEC Electronics or Synplicity sales office for more information on this promotion or to obtain evaluation versions of the software.

About Synplicity

Synplicity(R) Inc. (Nasdaq:SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity's high-quality, high-performance tools significantly reduce costs and time-to-market for FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. , Structured/Platform ASIC and cell-based/COT ASIC designers. The company's underlying Behavior Extracting Synthesis Technology(R) (BEST(TM)), which is embedded in its logical, physical and verification tools, and has led to Synplicity's top position in FPGA synthesis, now provides the same fast runtimes and quality of results to ASIC and COT customers. The company's fast, easy-to-use products support industry standard design languages (VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  and Verilog) and run on popular platforms. Synplicity employs over 270 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, California. For more information visit http://www.synplicity.com.

Forward-Looking Statements

This press release contains forward-looking statements including, but not limited to, statements regarding the performance and achievements of Synplicity's Synplify ASIC software designed for NEC Electronics' Gate Array products. In some cases, you will be able to identify forward-looking statements by terminology such as "may," "will," "should," "expects," "believes" or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual achievements or performance of the Synplify ASIC software for NEC Electronics' Gate Array products to differ materially from the forward-looking statements, including the performance and quality of Synplicity's software products relative to other comparable software (both individually and used in conjunction with third-party products), latent defects, design flaws or other problems with the Synplify ASIC software and the growth and changing technical requirements in the programmable semiconductor market. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K Form 10-K

A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information.


Form 10-K

See 10-K.
 for the year ended December 31, 2003 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q Form 10-Q

See 10-Q.
. Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement.

Synplicity, Behavior Extracting Synthesis Technology, Synplify ASIC and Amplify are registered trademarks of Synplicity Inc. BEST and HDL Analyst are trademarks of Synplicity Inc. All other names mentioned herein are the trademarks or registered trademarks of their owners.
COPYRIGHT 2004 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2004, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Jun 14, 2004
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