Synplicity Delivers Pro Version of Its Amplify ISSP Software to NEC Electronics' Customers; Customized Amplify ISSP Pro Software Delivers Better Area and Timing QoR for NEC Electronics' ISSP Devices.SUNNYVALE Sunnyvale, city (1990 pop. 117,229), Santa Clara co., W Calif., near San Francisco; settled 1849, inc. 1912. A city in Silicon Valley, its many manufactures include semiconductors; machinery and instruments; electrical, electronic, and aerospace products; , Calif. -- Synplicity Inc. (Nasdaq:SYNP SYNP Synchronization Profile ), a leading supplier of software for the design and verification of semiconductors, today announced an enhanced version of its Amplify(R) physical synthesis software that features additional customizations for NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).
NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd. Electronics' ISSP ISSP Institute for Solid State Physics (University of Tokyo)
ISSP International Social Survey Programme
ISSP Intensive Supervision and Surveillance Programme (UK)
ISSP International Space Station Program (TM) structured ASIC A type of application specific IC (ASIC) chip that contains blocks of logic, called "tiles" or "modules," that have their transistors already wired together forming gates along with some combination of multiplexors, flip/flops, look up tables and the like. devices. The new features in Synplicity's Amplify ISSP Pro software enable customers to achieve the highest quality of results for their ISSP devices -- in overall area, placement and timing. Specifically, Synplicity made many additions to its embedded Inserted into. See embedded system. clock tree synthesis approach for ISSP devices, whereby customers can leverage the technology to obtain better knowledge of the device's clock network and avoid design iterations. Additionally, the software features several other enhancements that help enable users to meet their ISSP performance goals in the shortest amount of time, including the new Affinity Placer(TM) and a floorplan input checker check·er
a. One, such as an inspector or examiner, that checks.
b. One that receives items for temporary safekeeping or for shipment: a baggage checker.
2. . With these improvements, Synplicity expects to continue to deliver the most advanced technology for structured and platform ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. design.
"NEC Electronics' ISSP devices offer customers a unique structured ASIC option," said Andy Haines, vice president of marketing at Synplicity. "For more than two years, Synplicity has worked closely with the leading structured/platform ASIC vendors in order to offer support for their unique architectures by delivering best-in-class design tools. Moving forward, we are committed to continuing this trend by offering improvements to our structured/platform ASIC physical synthesis solutions. With our Amplify ISSP Pro software, NEC Electronics' ISSP customers will be able to continue using Synplicity's familiar, easy-to-use physical synthesis software in their ISSP design flow to achieve the results they have come to expect from Synplicity."
The Amplify ISSP Pro software offers ISSP customers several unique technological innovations that specifically target NEC Electronics' ISSP architecture, including embedded clock-tree synthesis technology. With a customized embedded clock-driven memory placement approach in the Amplify ISSP Pro software, users can generate optimal legal placement for embedded ISSP memories. In addition, by understanding the delays within the embedded clock network the Amplify ISSP software can perform setup See BIOS setup and install program. and hold analysis and fix-up. This feature eliminates design iterations by accounting for the impact of the clock network on the floorplan and timing prior to handoff Switching a cellular phone transmission from one cell to another as a mobile user moves into a new cellular area. The switch takes place in about a quarter of a second so that the caller is generally unaware of it. . In the Amplify ISSP Pro software, both register and memory placement are done based on a preexisting pre·ex·ist or pre-ex·ist
v. pre·ex·ist·ed, pre·ex·ist·ing, pre·ex·ists
To exist before (something); precede: Dinosaurs preexisted humans.
v.intr. knowledge of the ISSP architecture.
Additional Features Within the Amplify ISSP Pro Software
Included in the Amplify ISSP Pro software is the new Affinity Placer that provides users a pre-placement constraint Constraint
A restriction on the natural degrees of freedom of a system. If n and m are the numbers of the natural and actual degrees of freedom, the difference n - m is the number of constraints. mechanism to keep conflicting paths from interfering with each other's performance. The Affinity Placer can yield significantly higher quality of results for circuit placement by specifically addressing the high speed I/Os offered in the ISSP product. The software also includes a floorplan input checker in order to check the quality of the floorplan and consistency of information against ISSP-specific rules before performing a physical synthesis run. The floorplan input checker validates the input and makes sure it is a "legal" floorplan for the ISSP master before committing it to physical synthesis. This feature enables users to catch design problems much earlier in the design flow and reduce the number of iterations.
The Amplify ISSP Pro software also enables the placement of firm IP through the software's floorplan editor. If the core is placed in an illegal position, the floorplan editor will automatically snap the core to the nearest legal placement. Specifically for ISSP90, the timing delay estimation estimation
In mathematics, use of a function or formula to derive a solution or make a prediction. Unlike approximation, it has precise connotations. In statistics, for example, it connotes the careful selection and testing of a function called an estimator. model has been enhanced to achieve better timing correlation. The combination of these new features and overall improvements in the software provides up to 10 percent better timing results and up to 30 percent improved runtime compared to previous versions of the Amplify ISSP software.
The Amplify ISSP Pro software is available now. For more information, visit Synplicity at http://www.synplicity.com.
About Synplicity's Amplify Family of Structured/Platform ASIC Products
The Amplify family of structured/platform ASIC products includes customized design tools that provide a one-pass placed gates handoff. These tools directly target and understand each unique structured/platform ASIC architecture and typically enable 15-20 percent speed and area improvements over conventional design flows, thereby bringing results much closer to that of standard-cell ASICs. The physical synthesis tools also solve the timing closure problem by being fully integrated and correlated cor·re·late
v. cor·re·lat·ed, cor·re·lat·ing, cor·re·lates
1. To put or bring into causal, complementary, parallel, or reciprocal relation.
2. to the structured/platform ASIC vendors tools. The combination of Synplicity tools and the vendors' pre-verified architectures automatically solves problems for ASIC designers such as design for test, power distribution, clock distribution, signal integrity, and manufacturability. Earlier this year, Synplicity's family of platform/structured ASIC products received the 2005 DesignVision Award, which recognizes technologies, applications, products and services judged to be the most unique and beneficial to the industry.
Synplicity(R) Inc. (Nasdaq:SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity's high-quality, high-performance tools significantly reduce costs and time to market for FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. , structured/platform ASIC and cell-based/COT ASIC designers. The company's underlying Behavior Extracting Synthesis Technology(R) (BEST(TM)), which is embedded in its logical, physical and verification tools, and has led to Synplicity's top position in FPGA synthesis, now provides the same fast runtimes and quality of results to structured/platform ASIC, cell-based ASIC and COT customers. The company's fast, easy-to-use products support industry standard design languages (VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog) and run on popular platforms. Synplicity employs over 280 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, California Sunnyvale ([sʌniveil]) is a city in Santa Clara County, California, United States. It is one of the major cities that make up the Silicon Valley. As of the 2000 census, the city population was 131,760. . For more information visit http://www.synplicity.com.
Forward-Looking Statements forward-looking statement
A projected financial statement based on management expectations. A forward-looking statement involves risks with regard to the accuracy of assumptions underlying the projections.
This press release contains forward-looking statements including, but not limited to, statements regarding the performance and achievements of Synplicity's Amplify family of structured/platform ASIC synthesis tools and the position of Synplicity and its products in the structured/platform ASIC. In some cases, you will be able to identify forward-looking statements by terminology such as "may," "will," "should," "expects," "believes," "can" or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the forward-looking statements and Synplicity's results to differ materially, including the performance and benefits of Synplicity's software relative to relevant industry methods or standards, design flaws, design difficulties or other problems with the Amplify software and the growth and changing technical requirements in the structured/platform ASIC market. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K Form 10-K
A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information.
See 10-K. for the year ended December 31, 2004 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q Form 10-Q
See 10-Q. . Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement.
Synplicity, Amplify and Behavior Extracting Synthesis Technology are registered trademarks of Synplicity Inc. BEST is a trademark of Synplicity Inc. All other brands or products are the trademarks or registered trademarks of their owners.