Synplicity Announces Synplify DSP ASIC Edition.Industry's Only DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive Synthesis Engine Targeting ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. Designs NICE, France -- Synplicity, Inc., a leading supplier of software for the design and verification of semiconductors, today announced the expansion of its ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. software offering. Following the company's strategy of delivering technology-independent solutions, the new Synplify([R]) DSP ASIC Edition software allows users to automatically develop high-quality RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; code from designs specified at the algorithm level for implementation into either an FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. or ASIC device. The Synplify DSP ASIC Edition's unique DSP synthesis optimizations automatically implement algorithms allowing designers to explore speed and area tradeoffs, often leading to significant area and timing improvements over hand-coded approaches. Because of this automation users can capture designs, explore implementation architectures and target them to FPGAs or their chosen ASIC technology. This results in significant productivity improvements often achieving 10 to 20x less development and verification time than otherwise required. Those who have used the beta product have experienced considerable advantages over traditional handcrafted hand·craft n. Variant of handicraft. tr.v. hand·craft·ed, hand·craft·ing, hand·crafts To fashion or make by hand. hand·craft flows. For ASIC technologies, the Synplify DSP ASIC Edition has additional features to provide seamless integration An addition of a new application, routine or device that works smoothly with the existing system. It implies that the new feature or program can be installed and used without problems. Contrast with "transparent," which implies that there is no discernible change after installation. of memory and RTL into standard ASIC design flows. For ASIC designs using compiled memories, the Synplify DSP ASIC Edition automatically extracts and manages the memory in a separate level of hierarchy. This allows the user to easily instantiate In object technology, to create an object of a specific class. See instance. instantiate - instantiation memory modules from any 3rd party memory vendor and verify the complete model at the RT level. As a result, the Synplify DSP ASIC Edition provides a solution that integrates well with familiar downstream logic synthesis The conversion of a high-level electronic circuit description into a list of logic gates and their interconnections, called the "netlist." Every logic synthesis program understands some subset of Verilog and VHDL. and verification flows. "Our Synplify DSP software has been tremendously successful among FPGA users who have experienced significant quality of results benefits, and we are eager to bring the same capabilities to ASIC users," said Andy Haines, senior vice president of marketing, Synplicity. "We believe the performance and productivity benefits offered by our Synplify DSP ASIC Edition software are so significant that it will become the technology of choice when designers implement DSP capabilities into either FPGA or ASIC hardware." From a single model, the Synplify DSP ASIC Edition software can automatically implement optimized architectures of algorithms into either FPGA or ASIC devices. For teams developing ASICs, the combination of Synplify DSP ASIC Edition and Synplicity's ASIC verification product suite allows users to quickly verify their ASIC designs in FPGAs at high speed. By prototyping ASIC designs in FPGAs functional bugs can be detected more rapidly and more complex interactions can be observed due to the high operating speed The operating speed of a road is the speed at which motor vehicles generally operate on that road. The precise definition of "operating speed", however, is open to debate. (typically above 100 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. ) of the FPGA. The software also supports third-party logic synthesis flows from Synopsys, Cadence and third-party ASIC memory IP providers. The Synplify DSP ASIC Edition software provides users with a fully integrated solution with standard ASIC flows. Pricing and Availability The Synplify DSP ASIC Edition software starts at $44,500 for a floating, one-year time-based license. For information about Synplicity's Synplify DSP ASIC Edition software, contact a Synplicity sales representative or visit http://www.synplicity.com. About Synplicity Synplicity[R] Inc. (Nasdaq:SYNP SYNP Synchronization Profile ) is a leading supplier of innovative software solutions that enable the rapid and effective design of Programmable Logic Devices (FPGAs, PLDs and CPLDs) that serve a wide range of communications, military/aerospace, consumer, semiconductor, computer, and other electronic systems markets. Synplicity's tools provide outstanding performance, cost and time-to-market benefits by simplifying, improving and automating key design planning, logic synthesis, physical synthesis and verification functions for FPGA, FPGA-based ASIC verification, and DSP designers. Synplicity is the number one supplier of FPGA synthesis solutions and has been rated #1 in customer satisfaction since 2004 in EE Times' Annual FPGA Customer Survey. Synplicity products support industry-standard design languages (VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog) and run on popular platforms. The company operates in over 20 facilities worldwide and is headquartered in Sunnyvale, California Sunnyvale ([sʌniveil]) is a city in Santa Clara County, California, United States. It is one of the major cities that make up the Silicon Valley. As of the 2000 census, the city population was 131,760. . For more information visit http://www.synplicity.com. Forward-Looking Statements This press release contains forward-looking statements including, but not limited to, statements regarding the performance, achievements, benefits and market position of the Synplify DSP ASIC Edition software. In some cases, you will be able to identify forward-looking statements by terminology such as "may," "will," "should," "expects," "can," "believes" or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual results to differ materially from the forward-looking statements, including the performance and benefits of Synplicity's software relative to relevant industry methods, standards, design flaws, design difficulties or other problems with the Synplify DSP ASIC Edition software, and the growth and changing technical requirements in the FPGA and ASIC markets. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K Form 10-K A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information. Form 10-K See 10-K. for the year ended December 31, 2006 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q Form 10-Q See 10-Q. . Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement. Synplicity and Synplify are registered trademarks of Synplicity Inc. All other brands or products are the trademarks or registered trademarks of their respective owners. |
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