Synplicity Announces Breakthrough ASIC Verification Solution.Identify Pro With TotalRecall Technology Brings Full Visibility to FPGA-Based ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. Prototyping SUNNYVALE, Calif. -- Synplicity, Inc. (Nasdaq:SYNP SYNP Synchronization Profile ), a leading supplier of software for the design and verification of semiconductors, today announced its revolutionary new Identify([R]) Pro ASIC and ASSP (Application Specific Standard Part) An ASIC chip that is designed as a generic device for a particular market. Whereas an ASIC is typically used only by its creator, ASSPs are used by many different companies in the design of their products. See ASIC. verification solution. The Identify Pro software, featuring Synplicity's TotalRecall([TM]) technology, provides designers with full visibility into FPGA-based ASIC and ASSP prototypes enabling them to find, fix and verify functional errors at speeds approaching that of the final device. Identify Pro software improves the productivity of existing verification methodologies, such as assertion-based verification and simulation, resulting in a significantly reduced overall verification time with improved verification coverage and quality. Working with popular simulation tools, such as Synopsys' VCS (1) (Verilog Computer Simulator) See Verilog. (2) (Version Control System) See version control. , (See today's related announcement, "Synopsys and Synplicity Establish Alliance to Advance High-Performance ASIC Verification") the Identify Pro solution automatically connects the prototype hardware with an existing software simulation environment in a transparent and seamless manner for comprehensive RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; code analysis and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. . The Identify Pro software provides initialization in·i·tial·ize tr.v. in·i·tial·ized, in·i·tial·iz·ing, in·i·tial·iz·es Computer Science 1. To set (a starting value of a variable). 2. To prepare (a computer or a printer) for use; boot. 3. of the simulator and automatically creates a test bench from the actual stimulus of the FPGA-based prototype, giving designers a verification solution that is orders of magnitude faster in performance than any other ASIC verification methodology. "Identify Pro ushers in a new era of hardware-assisted verification and it is one of the cornerstones of our ASIC and ASSP verification strategy," said Juergen Jaeger jaeger (yā`gər), common name for several members of the family Stercorariidae, member of a family of hawklike sea birds closely related to the gull and the tern. The skua is also a member of this family. , senior director of ASIC verification marketing at Synplicity. "As ASICs become bigger, more costly and more software-centric, it is critical for the design team to be able to effectively detect and analyze bugs that otherwise would be missed until final silicon. The Identify Pro software reduces this risk significantly by giving designers full visibility into their design running at hardware speed in an FPGA-based prototype. In case of an assertion, or other trigger, the design, together with an automatically generated test bench, is uploaded into a simulator for detailed debug and analysis. By combining the visibility of a simulator with the speed of hardware, the Identify Pro software provides a true breakthrough in ASIC verification." The Identify Pro software allows ASIC and ASSP designers, using an FPGA-based prototype system, to functionally debug their design at hardware speed, directly in their RTL source code. This allows functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, for RTL designs that is up to 10,000 times faster than RTL simulators and enables the use of "real-world" stimulus, making it an ideal verification platform for applications like networking, audio, video, and all designs with large amounts of software content. Used in conjunction with Synplicity's Synplify([R]) Premier physical synthesis tool, the Identify Pro software enables assertion synthesis into hardware and assertion debug. The Identify Pro software offers the fastest method of finding errors in an FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. or ASIC prototype by using live stimulus to quickly reach a trigger condition such as a functional bug or assertion failure. By using advanced triggering capabilities, including assertions that are inserted into the RTL source code, design problems are found that could take a simulator days or weeks to uncover. Once a functional bug or assertion failure is found, the Identify Pro tool's TotalRecall technology is used to initialize To start anew, which typically involves clearing all or some part of memory or disk. a standard software simulator with all signal and state values at a user-defined number of clock cycles prior to the trigger being reached. The complete module state, along with a test bench, is automatically exported to an RTL simulator where the user can replay the sequence and diagnose bugs in the original RTL source code. The Identify Pro product is ideal for ASIC verification teams using FPGA hardware as it allows them to quickly find functional errors in their design. With the coverage of real-world data and the speed of real hardware, the Identify Pro tool provides a comprehensive verification environment for finding, fixing, and verifying functional errors in FPGA and ASIC designs. Identify Pro Pricing and Availability The Identify Pro software, featuring the TotalRecall technology, will be available for early adopters in the third quarter of 2007. Prices range from $34,500 (USD USD In currencies, this is the abbreviation for the U.S. Dollar. Notes: The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion. ) for a one-year time-based license to $69,000 (USD) for a perpetual, floating license. About Synplicity Synplicity[R], Inc. (Nasdaq:SYNP) is a leading supplier of innovative software solutions that enable the rapid and effective design of Programmable Logic Devices (FPGAs, PLDs and CPLDs) that serve a wide range of communications, military/aerospace, consumer, semiconductor, computer, and other electronic systems markets. Synplicity's tools provide outstanding performance, cost and time-to-market benefits by simplifying, improving and automating key design planning, logic synthesis The conversion of a high-level electronic circuit description into a list of logic gates and their interconnections, called the "netlist." Every logic synthesis program understands some subset of Verilog and VHDL. , physical synthesis and verification functions for FPGA, FPGA-based ASIC verification, and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive designers. Synplicity is the number one supplier of FPGA synthesis solutions and has been rated #1 in customer satisfaction since 2004 in EE Times' Annual FPGA Customer Survey. Synplicity products support industry-standard design languages (VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog) and run on popular platforms. The company operates in over 20 facilities worldwide and is headquartered in Sunnyvale, California Sunnyvale ([sʌniveil]) is a city in Santa Clara County, California, United States. It is one of the major cities that make up the Silicon Valley. As of the 2000 census, the city population was 131,760. . For more information visit http://www.synplicity.com. Forward-Looking Statements This press release contains forward-looking statements including, but not limited to, statements regarding the performance, achievements, benefits and market position of the Identify Pro software. In some cases, you will be able to identify forward-looking statements by terminology such as "may," "will," "should," "expects," "can," "believes" or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual results to differ materially from the forward-looking statements, including the performance and benefits of Synplicity's software relative to relevant industry methods, standards, design flaws, design difficulties or other problems with the Identify Pro software, and the growth and changing technical requirements in the FPGA and ASIC markets. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K Form 10-K A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information. Form 10-K See 10-K. for the year ended December 31, 2006 and Form 10-Q Form 10-Q See 10-Q. for the quarter ended March 31, 2007 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time. Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement. Synplicity, Identify, and Synplify are registered trademarks of Synplicity Inc. TotalRecall is a trademark of Synplicity. All other names mentioned herein are the trademarks or registered trademarks of their owners. SYB-0004 |
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