Synopsys Opens Vera Language to Provide an Open Platform to Unify the Verification Market.Business Editors/High-Tech Writers MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--April 2, 2001 Over Thirty EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. Vendors, IP Vendors and End Users Endorse Vera Open Source Initiative to Solve Key System-on-a-Chip Challenges Synopsys, Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ) today announced the Vera Open Source Initiative and the availability of OpenVera(TM) as an open source hardware verification language A Hardware Verification Language, or HVL, is a programming language used to verify the designs of electronic circuits written in a hardware description language. HVLs typically include features of a high-level programming language like C++ or Java as well as features for . The initiative will benefit customers and the industry by fostering the growth and availability of tools and intellectual property (IP) around an open source language. More than thirty EDA, IP and system on a chip (SoC) design companies have endorsed OpenVera and the Vera Open Source Initiative. OpenVera 1.0 is available free of charge at http://www.open-vera.com. "Sun Microsystems Sun Microsystems, Inc. (NASDAQ: JAVA[3]) is an American vendor of computers, computer components, computer software, and information-technology services, founded on 24 February 1982. has always been a strong proponent of open standards Specifications for hardware and software that are developed by a standards organization or a consortium involved in supporting a standard. Available to the public for developing compliant products, open standards imply "open systems;" that an existing component in a system can be replaced ," said Sunil Joshi Sunil Joshi (Kannada:ಸುನಿಲ್ ಜೋಷಿ) pronunciation (born June 6, 1970, Gadag, Karnataka) is an Indian cricketer. , vice president, Design Automation and Compute Resources at Sun Microsystems. "There is a tremendous need for standardization of verification languages and the Vera Open Source Initiative is a step in the right direction. Sun was an early technology contributor to VERA(R) and incorporated it into our verification flow more than six years ago. The Vera Open Source Initiative should foster innovations enabling the creation of many verification tools around a standard language." "The Vera Open Source Initiative presents an opportunity for the verification market to converge right away around a standard SoC verification language, thus avoiding the problems that multiple proprietary languages cause designers," stated Aart de Geus, chairman and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Synopsys. "OpenVera will increase innovation and tool development and, most importantly Adv. 1. most importantly - above and beyond all other consideration; "above all, you must be independent" above all, most especially , help users overcome the verification challenges of next-generation SoC." SoC Verification Challenges Functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, is a resource-intensive task accounting for up to 70 percent of the total SoC development effort. Part of this verification bottleneck is testbench creation, which can be more complex than designing the hardware itself. Designers have turned to optimized verification languages that offer the high level of abstraction The level of complexity by which a system is viewed. The higher the level, the less detail. The lower the level, the more detail. The highest level of abstraction is the single system itself. and features necessary for successful functional verification of complex SoCs. While this market has been growing rapidly, third party EDA tool vendors have been hesitant to build complementary solutions around these proprietary languages. Speeding up the adoption of a common hardware verification language through OpenVera is expected to allow EDA vendors to focus on tool innovation, and customers to get access to interoperable tools to solve their SoC verification challenges. "Tensilica is the leading provider of configurable processors and a successful user of the Vera Testbench tool. We currently use Vera for verification of all our RT-level models and have been making Vera-based environments available to our customers for two years. We believe the Vera Open Source Initiative will enable the IP industry to have access to a broad set of tools and services around an open language and will encourage verification testbench portability for our customers," said Beatrice Fu, vice president of Engineering at Tensilica. OpenVera is a proven language supported in the Synopsys VERA(R) testbench tool that has over 50 percent market share in the testbench automation market, according to the Dataquest/Gartner Group report titled EDA Market Trends, published in November of 2000. VERA has gained wide acceptance among SoC design teams in IP, processor, computer systems, networking and telecommunications companies. "Redback Networks is successfully using the Vera testbench tool for ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. verification and we welcome the Vera Open Source Initiative," said Mike Yamamura, vice president of ASIC Development at Redback Networks. "This initiative will help tool vendors and verification engineers by providing an opportunity to create interoperable tools based on an open and standard hardware verification language." Industry Endorsement of OpenVera and the Vera Open Source Initiative More than thirty EDA, IP and SoC design companies have expressed their endorsement of OpenVera and the Vera Open Source Initiative. These companies include 0-In Design Automation, Antrim Design Systems Inc., Aptix Corp., ARC Cores, ARM, Averant, Avici Systems Inc., Axis Systems Inc., Chronology Corp., Compaq, CoWare Inc., Denali Software Inc., GDA GDA Grupo de Diarios de América (Spanish) GDA Global Development Alliance (USAID) GDA Guideline Daily Amount GDA Georgia Dental Association GDA Greenwich Dance Agency (England) Technologies Inc., Hewlett-Packard Company, IKOS Systems, Innologic Systems, Innoveda, Interra Technologies, Intrinsix Corp., MIPS Technologies Inc., Novas Software Inc., Qualis Design, Real Intent, Redback Networks, Samsung Electronics, Stratus Technologies, Sun Microsystems Inc., SynaptiCAD, Tensilica Inc., Tharas Systems Inc., Toshiba Semiconductor Company, Verplex Systems Inc., and ZAIQ Technologies Inc. A complete list of these endorsements, as well as supporting quotes are available at http://www.open-vera.com. How to Access OpenVera SoC design teams, verification teams and EDA developers can access OpenVera by downloading the Language Reference Manual (LRM LRM Language Reference Manual LRM Casa De Campo, Dominican Republic (Airport Code) LRM Long Range Missile LRM Line Replaceable Module LRM Local Resource Manager LRM Line-Reflect-Match LRM Land Resources Management ) from the OpenVera web site at www.open-vera.com. There are no licensing fees for OpenVera and there is unrestricted access to the language and documentation, subject to the OpenVera license. Synopsys will serve as the managing entity for OpenVera and guide the open language development. Developers can use the language and create complementary tools. About Open Source Initiatives Open source initiatives are quickly gaining popularity with proven successes such as Linux, Java(TM), Liberty(TM), SystemC, LEF LEF Life Extension Foundation LEF Leading Edge Forum (CSC) LEF Local Education Funds LEF Literacy Empowerment Foundation LEF Library Exchange Format (Cadence Design Systems) and Synopsys Design Constraints (SDC SDC Silver Dollar City SDC Security Door Controls SDC Student Development Center SDC San Diego Chargers SDC Science Data Center SDC System Development Charges SDC Studebaker Drivers Club SDC San Diego, California (border patrol sector) ). With Synopsys' open source model, the user community can enhance the standard and submit changes to Synopsys for incorporation in future revisions of the LRM, which speeds up development of a high quality, well-supported standard. About OpenVera OpenVera is an intuitive, high-level, object-oriented programming language object-oriented programming language - object-oriented programming developed specifically to meet the unique requirements of functional verification. The language enables users to describe the target application environment, including complex protocols and data objects, at a high level of abstraction, which dramatically increases productivity, readability and reusability. About Synopsys Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View, creates leading electronic design automation (EDA) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems and systems on a chip. Synopsys also provides consulting and support services support services Psychology Non-health care-related ancillary services–eg, transportation, financial aid, support groups, homemaker services, respite services, and other services to simplify the overall IC design process and accelerate time to market for its customers. Visit Synopsys at http://www.synopsys.com. Forward Looking Statement This release contains forward-looking statements under the safe harbor Safe Harbor 1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated. 2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive. provisions of Section 21E of the Securities Exchange Act of 1934 including, specifically, statements regarding the impact and benefits of the Vera Open Source Initiative. These statements are based on Synopsys' current expectations and beliefs. Actual results could differ materially from the results implied by these statements. Factors that could cause results to differ from these statements include the competitive nature of the electronic design automation industry, the development or adoption of alternative technologies or methods for addressing verification, and uncertainties inherent in the rate of which complex technology is adopted, as well as factors identified in documents filed by Synopsys with the Securities and Exchange Commission, especially the most recent report on Form 10-K Form 10-K A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information. Form 10-K See 10-K. . Note to Editors: Synopsys, the Synopsys logo and VERA are registered trademarks of Synopsys, Inc. OpenVera and Liberty are trademarks of Synopsys Inc. All other brands or products are trademarks of their respective owners and should be treated as such. |
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