Synopsys Announces STMicroelectronics' Endorsement of VCS Verilog Simulator for ASIC Sign-Off; VCS Meets Customer Demand for Fast Verilog Performance.

Business Editors/High-Tech Writers

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--May 1, 2002

Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex integrated circuit (IC) design, today announced that STMicroelectronics has officially endorsed Synopsys' VCS(TM) Verilog simulator for ASIC sign-off. STMicroelectronics certified VCS for sign-off simulation of Verilog designs based on its 0.18-micron system-on-a-chip (SoC) technology (HCMOS8). With this endorsement, STMicroelectronics joins the list of more than thirty ASIC vendors who support their customers with VCS' leading performance, capacity, and functionality to overcome verification challenges.

STMicroelectronics, the third largest semiconductor company in the world according to Gartner Dataquest, has developed a worldwide network of strategic alliances, including product development with key customers and CAD development alliances with major EDA suppliers. By supporting VCS, STMicroelectronics has extended its current capability to offer leading-edge solutions to customers in all segments of the electronics industry.

"To meet our customers' requirements, we complement our proprietary technologies with core technologies from key partners," said Marco Montalti, director of the Design Methodology Group of the Digital and Analog Semicustom Division of STMicroelectronics. "Our evaluation of VCS' performance and accuracy showed it well-suited for customers requiring Verilog verification at all design phases, including gate-level for ASIC sign-off."

In addition to leading performance and high capacity, the VCS Verilog simulator provides comprehensive built-in coverage metrics and high performance integration with C/C++ functions required for verifying multi-million gate SoC designs. VCS is the foundation for Synopsys' complete line of functional verification solutions, supporting Verilog, VHDL, mixed-HDL and mixed-signal simulation for complex SoC designs. Integrated with more than 20 third-party tools, VCS provides a flexible open verification environment that is now available in the STMicroelectronics' ASIC design flow.

"STMicroelectronics and Synopsys have worked closely together to ensure that our products provide a complete and seamless design solution," said Farhad Hayat, vice president of marketing, Verification Technology Group at Synopsys. "STMicroelectronics' support of VCS extends this solution to our mutual customers with leading verification performance."

Complete Functional Verification Solution

Synopsys offers a complete line of integrated functional verification solutions aimed at achieving the highest functional coverage in the shortest amount of time for complex IC designs. These solutions include Synopsys VCS(TM) Verilog simulator, Scirocco(TM) VHDL simulator, MX package for mixed-HDL simulation, CoCentric(R) System Studio for SystemC simulation, VERA(R) testbench automation tool, DesignWare(R) verification IP, LEDA(R) programmable HDL checker, NanoSim(TM) circuit simulation and Formality(R) equivalence checker.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View, Calif., creates leading electronic design automation (EDA) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems and SoC. Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers. Visit Synopsys at http://www.synopsys.com/.

Note to Editors: Synopsys, VERA, DesignWare, LEDA, Formality, and CoCentric are registered trademarks of Synopsys, Inc. Design Compiler, NanoSim, Scirocco and VCS are trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.