Printer Friendly
The Free Library
14,702,407 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Synopsys' VCS Verilog Simulator Delivers Accurate Gate-level ASIC Simulation to Oki Semiconductor Customers.


Business Editors and Technology Writers

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--May 25, 2000

Synopsys' VCS (1) (Verilog Computer Simulator) See Verilog.

(2) (Version Control System) See version control.
 Verilog Simulator Delivers Performance,

Accuracy and Capacity

Oki Semiconductor and Synopsys, Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ), reported the adoption of VCS(TM) as the sign-off simulator for Oki's entire range of 0.35 and 0.25 micron ASICs.

Oki customers designing complex, multimillion-gate ASICs now can accurately simulate their designs at the gate-level using Synopsys' VCS version 5.1.

"We are seeing much better performance, accuracy and capacity with VCS on our system-on-a-chip designs," said Jamshed Qamar, vice president, engineering department, R&D division of Oki Semiconductor. "Fast sign-off capability helps meet our customers' critical time to market requirements."

"Synopsys is pleased with Oki's recommendation of VCS as a sign-off simulator," said Ghulam Nurie, vice president of marketing for Synopsys' verification technology group. "Sign-off means 'quality' and 'confidence', providing a clean verification flow for our mutual customers designing complex, multimillion-gate ASICs."

Oki's ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  Products

Oki Semiconductor has a major presence in the ASIC market, with extensive research and development partnerships with leading tool vendors. Oki's family of very deep submicron ASICs meets the industry's need for high-performance, low-cost system-level solutions, fueling the transition to system-on-a-chip (SoC) designs. Oki's ASICs are developed using an innovative platform-based approach that enables higher levels of productivity, reduced cycle time, and lower development risk through the sharing and re-use of intellectual property blocks. Oki's innovative mPlat ASIC platform is the world's first true ARM-based SoC, enabling Oki's customers to develop custom ICs in less time than with conventional ASICs. Information on Oki Semiconductor and its products is available through its web site at http://www.okisemi.com.

About VCS

VCS is the industry's highest performance Verilog simulator. Built on proven native compiled technology, it provides extremely fast simulation without requiring methodology changes. This combination makes VCS ideal for all design cycle phases. Supported by over 150 of the most advanced technology libraries currently available from every major semiconductor vendor worldwide, VCS has consistently obtained the Si2 Library Qualification Seal. VCS supports Open Verilog International and IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields.  industry standards, and interfaces to leading third-party verification tools such as hardware/software co-verification, graphical debug and analysis, code coverage and testbench generation.

About Synopsys' Verification Solution

VCS is part of a powerful suite of Synopsys high-level verification products and services which includes Scirocco sci·roc·co  
n.
Variant of sirocco.
(TM), high-performance VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  simulator; Cyclone(R)/VSS(TM) VHDL simulation; a comprehensive range of proven Logic Modeling(R) IP models and model development tools for simulation; Synopsys Eaglei(R) hardware/software co-verification tools; and, VERA VERA Virtual Entity of Relevant Acronyms
VERA Virtual Electronic Resource Access
VERA Vienna Environmental Research Accelerator
VERA Verzeichnis Edv-Relevanter Akronyme (German: Virtual Entity of Relevant Acronyms; website) 
(TM) testbench automation and analysis products to help meet the functional verification challenges of complex designs. These tools conform to current industry standards ensuring easy integration with customer design environments. For more information on the Synopsys verification solution, visit the worldwide web at http://www.synopsys.com/verifyit, contact your local Synopsys representative, email verify@synopsys.com, or, in North America, phone 800/346-6335.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View, California For the census-designated place, see Mountain View, Contra Costa County, California. For other places called "Mountain View", see .
Mountain View is a city in Santa Clara County, in the U.S. state of California. The city gets its name from the views of the Santa Cruz Mountains.
, creates leading electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems, and systems on a chip. Synopsys also provides consulting and support services support services Psychology Non-health care-related ancillary services–eg, transportation, financial aid, support groups, homemaker services, respite services, and other services  to simplify the overall IC design process and accelerate time to market for its customers. Visit Synopsys at http://www.synopsys.com.

Synopsys, Logic Modeling, Cyclone and Synopsys Eaglei are registered trademarks and Scirocco, VCS, VSS See Vcc. , and VERA are trademarks of Synopsys, Inc. All other trademarks mentioned in this release are the intellectual property of their respective owners.
COPYRIGHT 2000 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2000, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:May 25, 2000
Words:596
Previous Article:Inc. Magazine and Cisco Systems Name eHome Winner at Growing with Technology Awards Ceremony.
Next Article:VHS Network Inc. Announced Today Its 8K Filing to Meet SEC Requirements.
Topics:



Related Articles
American Microsystems Signs Off On Synopsys' VCS; Provides VCS Sign-off Support for AMI's 0.35-micron ASIC Process.
Hitachi Endorses Synopsys' VCS for Sign Off; VCS Now Certified for Hitachi's HG73 and HG75 Deep Submicon ASIC Technologies.
Atmel Endorses Synopsys VCS Simulator for Sign-Off; Accelerates SoC Design Verification with Rapid, Full-Timing Simulation.
SYNOPSYS AGAIN RAISES BAR ON VERILOG SIMULATION PERFORMANCE; VCS 5.2 Delivers New Profiling Tool and Tighter Integration with CoverMeter.
Synopsys' VCS Verilog Simulator Enables AMD to Achieve Major Milestone in Simulation Speed; Market-leading VCS Simulator Maximizes Linux-based AMD...
Synopsys' Power Compiler Added to Oki Semiconductor's Advanced ASIC Design Kit; Power Compiler Delivers 'Push-Button' Power Optimization For Deep...
Synopsys' VERA Adopted by Transmeta for Verification of Crusoe Family of Microprocessors; Transmeta Improves Verification Efficiency and Expands...
@HDL RELEASES ENHANCED VERSION OF VERILOG DEBUGGING TOOL.(Product Announcement)
ModelSim Achieves Verilog Sign-off from LSI Logic; Sign-off Using VHDL Testbench and Verilog Gate-level Netlist Now Available.
Synopsys Announces STMicroelectronics' Endorsement of VCS Verilog Simulator for ASIC Sign-Off; VCS Meets Customer Demand for Fast Verilog Performance.

Terms of use | Copyright © 2009 Farlex, Inc. | Feedback | For webmasters | Submit articles