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SuperH Announces Record-Breaking Benchmark Scores for SH4-202 RISC CPU Core.


Business Editors/High-Tech Writers

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--April 23, 2003

SuperH, Inc., the leading supplier of multimedia RISC RISC
 in full Reduced Instruction Set Computing

Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s.
 CPU CPU
 in full central processing unit

Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit.
 cores, today announced that it has received outstanding scores from the Embedded Microprocessor Embedded microprocessors are essentially microprocessors that are used in everyday electronic devices, such as cellular telephones, household appliances, automobiles, or virtually any electronic device you could think of.  Benchmark Consortium (EEMBC EEMBC EDN Embedded Microprocessor Benchmark Consortium (Electronic Design News Magazine) ) for its SH4-202 RISC CPU core family.

The SH4-202 was tested against EEMBC benchmark suites that represent the performance of embedded processors in automotive/industrial and consumer applications. Under optimized test conditions with EEMBC benchmark source code optimized using assembly coding, the SH4-202 received record breaking scores of 1.15378 Automarks and .20483 Consumermarks per MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. .

The benchmark scores were obtained in a cycle-accurate, 266-MHz simulation using the open-source GNU gnu (n) or wildebeest (wĭl`dəbēst'), large African antelope, genus Connochaetes.  gcc 3.2.1 Vienna 1.3 beta compiler.

"Our Full Fury scores for the SH4-202 demonstrate the unleashed potential of the SH-4 core and its high-performance 4-way vector FPU (Floating Point Unit) A computer circuit that handles floating point operations.

FPU - floating-point unit
, which enable a whole new category of advanced graphics and video applications for consumer embedded systems Embedded systems

Computer systems that cannot be programmed by the user because they are preprogrammed for a specific task and are buried within the equipment they serve.
," said Rick Chapman, VP of Marketing & Sales at SuperH, Inc. "These new scores provide a further validation of our architecture while providing a significant measure of processor performance according to standards that the industry has agreed upon."

CPU cores in the SH-4 family are based on a 32-bit SuperH RISC core available as a soft core or a range of hard cores optimized for different silicon processes. The published EEMBC scores are benchmarked on the SH4-202 with 2-way, 32-KB data and 16-KB instruction caches. System-on-chip products based on the SH-4 core utilize the SuperHyway(TM), a configurable on-chip memory-mapped split-transaction packet-routing interconnect capable of supporting high-bandwidth and low-latency transactions.

"These certified EEMBC benchmark scores have allowed SuperH to credibly demonstrate the performance benefits of its SH-4 architecture," said Markus Levy, EEMBC president. "SuperH is also the first EEMBC member to provide optimized scores for a device using the EEMBC automotive/industrial benchmark suite, which demonstrates the company's commitment to this market segment."

About EEMBC and ECL (Emitter-Coupled Logic) A digital circuit composed of bipolar transistors in which the emitter ends are wired together. ECL gates switch faster than TTL gates, but consume more power. See TTL, I2L and bipolar.

1.
 

EEMBC develops and certifies real-world benchmarks and benchmark scores to help designers select the right embedded processors for their systems. Every processor submitted for EEMBC(R) benchmarking is tested for parameters representing different workloads and capabilities in communications, networking, consumer, office automation, automotive/industrial, embedded Java, and microcontroller-related applications. With members including leading semiconductor, intellectual property, and compiler companies, EEMBC establishes benchmark standards and provides certified benchmarking results through the EEMBC Certification Labs (ECL) in Texas and California.

About SuperH, Inc.

SuperH, Inc. is a semiconductor intellectual property (SIP) licensing company and is the leading supplier of multimedia RISC CPU cores to companies building system-on-chip (SoC) products.

SuperH, Inc. develops RISC CPU cores, the SuperHyway Bus(TM) on-chip interconnect and software development tools. The SuperH(TM) family today includes the 32-bit SH-4 and 64-bit SH-5 CPU cores and is ideally suited to multimedia applications that require a single CPU core executing a mix of general purpose code and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  algorithms. SuperH CPU cores are targeted at consumer, automotive, telecom and handheld multimedia appliance markets with specific emphasis on set top box, residential gateway, car information systems, modems, digital camera and multimedia players.

Further information about SuperH, Inc. and SuperH products can be found at www.superh.com.

Trademarks

SuperH(TM) is a trademark owned by Renesas Technology Corp. The names of actual companies and products mentioned herein may be the trademarks of their respective owners.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Apr 23, 2003
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