Summit's Text-to-Graphics Addresses Design Reuse, Enables IC and System Designers to Turn HDL Text into Executable Graphical Specifications; Visual HDL Breakthrough Preserves Legacy Designs, Supports Code Reuse, and Provides Insight into Results of Behavioral Synthesis.BEAVERTON, Ore.--(BUSINESS WIRE)--March 17, 1997--Summit Design, Inc. (NASDAQ NASDAQ
in full National Association of Securities Dealers Automated Quotations
U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on :SMMT SMMT Society of Motor Manufacturers and Traders
SMMT Short Message Mobile Terminated
SMMT System Mechanic Mobile Toolkit ) today announced a major technology breakthrough in its Visual HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. electronic system design automation (ESDA ESDA exploratory spatial data analysis
ESDA Electrostatic Discharge Association
ESDA Emergency Services & Disaster Agency (Civil Defense)
ESDA Electrostatic Detection Apparatus ) tool that enables conversion of IC and system designs, originally written as hardware description language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog. (HDL) text files, into intuitive, executable graphical specifications.
Visual HDL is the first ESDA tool to offer full text-to-graphics capabilities that allow electronic designers of all skill levels to utilize any existing HDL code by turning it into easy-to-understand graphics, including block diagrams A chart that contains squares and rectangles connected with arrows to depict hardware and software interconnections. For program flow charts, information system flow charts, circuit diagrams and communications networks, more elaborate graphical representations are usually used. , state diagrams, and flow charts. Summit's text-to-graphics feature gives designers the ability to resurrect and enhance old designs, document and reuse code, and better understand the generated register-transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) output from behavioral synthesis tools.
"Now one tool establishes an environment where designers can flow freely between text and graphical entry," said Dan Skilken, senior vice president of worldwide marketing of Summit. "This introduction expands the appeal of our graphical HDL tool to the expert HDL design segment of the market place."
Increases Code Value and Designer Productivity
Visual HDL's text-to-graphics feature provides three significant benefits to designers and design teams: preservation of legacy code; automated documentation and reuse of manually-written code; and, post-synthesis analysis for behavioral synthesis.
For large companies or design teams that want to leverage existing, poorly documented code, the graphical documentation provided by text-to-graphics enables designers to easily understand the design intent of existing text files so that they can be enhanced in future designs. For expert coders, text-to-graphics provides an automated process for graphical documentation of manually-written HDL text. Graphical documentation improves designers' ability to understand and reuse designs in subsequent projects.
For designers adopting behavioral HDL design methodologies and using behavioral synthesis, text-to-graphics increases productivity by providing insight into the optimized RTL code output of a behavioral synthesis tool. Designers can use Visual HDL to convert the "black box" RTL text results from behavioral synthesis tools into graphical representations to examine the tool's effect on control and data flow logic. By analyzing the behavioral synthesis output, designers can adjust their behavioral source code to improve synthesis results or simply edit the design graphically in Visual HDL to make improvements.
Correct HDL Code Interpretation
Summit has performed many years of research and development on the Visual HDL algorithms for interpreting and converting HDL text into graphics. These advanced algorithms have been tested extensively on actual customer code to ensure correct conversion into graphical representations.
"Visual HDL can now quickly and accurately turn HDL text into graphical design specifications," said Moshe Guy, vice president of product marketing at Summit. "These graphical specifications can be edited and used to regenerate re·gen·er·ate
v. re·gen·er·at·ed, re·gen·er·at·ing, re·gen·er·ates
1. To reform spiritually or morally.
2. To form, construct, or create anew, especially in an improved state. optimized code. Design teams standardizing on Visual HDL as their next-generation entry tool have the freedom to work in both text and graphics. Visual HDL ensures engineering management that all their intellectual property in the form of HDL text written by a designer can be preserved and leveraged going forward."
The text-to-graphics process starts by loading a hierarchical design text file of any size into Visual HDL's native HDL database. Designers invoke the text-to-graphics functions and Visual HDL interprets the code and begins converting it into structural block diagrams, state diagrams, and flow charts.
Designers can then edit, modify, view, and print the converted text design just as if it were originally created using Visual HDL's graphical editors. During the text-to-graphics conversion process, Visual HDL retains all the documentation and comments included in the design source code.
Pricing and Availability
Summit's text-to-graphics capability is currently in beta test A test of new or revised hardware or software that is performed by users at their facilities under normal operating conditions. Beta testing follows alpha testing. Vendors of packaged software often offer their customers the opportunity of beta testing new releases or versions, and the and will be available as an option for both PC and workstation Visual HDL users priced at $10,000 U.S. list. Verilog text-to-graphics will be available in late Q2 1997 and VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. text-to-graphics will be available in Q3 1997. For more information, browse Summit's web page at http://www.summit-design.com .
Summit Design, Inc. (NASDAQ:SMMT) is a leading, international supplier of engineering software products for the creation of electronic systems and integrated circuits Integrated circuits
Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. (ICs) using top-down design A design technique that starts with the highest level of an idea and works its way down to the lowest level of detail. See top-down programming.
(programming) top-down design - (Or "stepwise refinement"). methodologies. The company develops, manufactures and markets tools for design specification entry, design verification, and test program generation. The world's top electronics companies use Summit products to increase engineering and manufacturing productivity, reduce development time and improve the quality of their products.
Summit is located at 9305 S.W. Gemini Drive, Beaverton, Oregon Beaverton is a city in Washington County, Oregon, United States, seven miles west of Portland in the Tualatin River Valley. As of May 2006, its population is estimated to be 84,270, 9.1% more than the 2000 census figure of 76,129. , 97008, 503/643-9281. -0-
Note To Editors: Visual HDL is a trademark of Summit.
CONTACT: Summit Design, Inc.
Daniel Skilken, 503/526-6363
Scott Seiden or Lou Covey, 415/637-8212