Summit's Text-to-Graphics Addresses Design Reuse, Enables IC and System Designers to Turn HDL Text into Executable Graphical Specifications; Visual HDL Breakthrough Preserves Legacy Designs, Supports Code Reuse, and Provides Insight into Results of Behavioral Synthesis.
Visual HDL is the first ESDA tool to offer full text-to-graphics capabilities that allow electronic designers of all skill levels to utilize any existing HDL code by turning it into easy-to-understand graphics, including block diagrams, state diagrams, and flow charts. Summit's text-to-graphics feature gives designers the ability to resurrect and enhance old designs, document and reuse code, and better understand the generated register-transfer level (RTL) output from behavioral synthesis tools.
"Now one tool establishes an environment where designers can flow freely between text and graphical entry," said Dan Skilken, senior vice president of worldwide marketing of Summit. "This introduction expands the appeal of our graphical HDL tool to the expert HDL design segment of the market place."
Increases Code Value and Designer Productivity
Visual HDL's text-to-graphics feature provides three significant benefits to designers and design teams: preservation of legacy code; automated documentation and reuse of manually-written code; and, post-synthesis analysis for behavioral synthesis.
For large companies or design teams that want to leverage existing, poorly documented code, the graphical documentation provided by text-to-graphics enables designers to easily understand the design intent of existing text files so that they can be enhanced in future designs. For expert coders, text-to-graphics provides an automated process for graphical documentation of manually-written HDL text. Graphical documentation improves designers' ability to understand and reuse designs in subsequent projects.
For designers adopting behavioral HDL design methodologies and using behavioral synthesis, text-to-graphics increases productivity by providing insight into the optimized RTL code output of a behavioral synthesis tool. Designers can use Visual HDL to convert the "black box" RTL text results from behavioral synthesis tools into graphical representations to examine the tool's effect on control and data flow logic. By analyzing the behavioral synthesis output, designers can adjust their behavioral source code to improve synthesis results or simply edit the design graphically in Visual HDL to make improvements.
Correct HDL Code Interpretation
Summit has performed many years of research and development on the Visual HDL algorithms for interpreting and converting HDL text into graphics. These advanced algorithms have been tested extensively on actual customer code to ensure correct conversion into graphical representations.
"Visual HDL can now quickly and accurately turn HDL text into graphical design specifications," said Moshe Guy, vice president of product marketing at Summit. "These graphical specifications can be edited and used to regenerate optimized code. Design teams standardizing on Visual HDL as their next-generation entry tool have the freedom to work in both text and graphics. Visual HDL ensures engineering management that all their intellectual property in the form of HDL text written by a designer can be preserved and leveraged going forward."
The text-to-graphics process starts by loading a hierarchical design text file of any size into Visual HDL's native HDL database. Designers invoke the text-to-graphics functions and Visual HDL interprets the code and begins converting it into structural block diagrams, state diagrams, and flow charts.
Designers can then edit, modify, view, and print the converted text design just as if it were originally created using Visual HDL's graphical editors. During the text-to-graphics conversion process, Visual HDL retains all the documentation and comments included in the design source code.
Pricing and Availability
Summit's text-to-graphics capability is currently in beta test and will be available as an option for both PC and workstation Visual HDL users priced at $10,000 U.S. list. Verilog text-to-graphics will be available in late Q2 1997 and VHDL text-to-graphics will be available in Q3 1997. For more information, browse Summit's web page at http://www.summit-design.com .
Summit Design, Inc. (NASDAQ:SMMT) is a leading, international supplier of engineering software products for the creation of electronic systems and integrated circuits (ICs) using top-down design methodologies. The company develops, manufactures and markets tools for design specification entry, design verification, and test program generation. The world's top electronics companies use Summit products to increase engineering and manufacturing productivity, reduce development time and improve the quality of their products.
Summit is located at 9305 S.W. Gemini Drive, Beaverton, Oregon, 97008, 503/643-9281. -0-
Note To Editors: Visual HDL is a trademark of Summit.
CONTACT: Summit Design, Inc.
Daniel Skilken, 503/526-6363
Scott Seiden or Lou Covey, 415/637-8212
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|Date:||Mar 17, 1997|
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