Stanford News: Stanford, UCLA, UC Santa Barbara and UC Berkeley Join to Establish The Western Institute of Nanoelectronics.STANFORD, Calif. -- Institute Brings Together Best Interdisciplinary Talents in Nanoelectronics Worldwide; Collaboration Is Among World's Largest Spintronics Efforts The UCLA UCLA University of California at Los Angeles UCLA University Center for Learning Assistance (Illinois State University) UCLA University of Carrollton, TX and Lower Addison, TX Henry Samueli Henry Samueli (born September 20, 1954 in Buffalo, New York) is co-founder, chairman, and chief technology officer of the Broadcom Corporation and a philanthropist in the Orange County, California community. School of Engineering and Applied Science School of Engineering and Applied Science is the name of several engineering schools at universities in the United States.
The Western Institute of Nanoelectronics' administrative headquarters will be located at UCLA Engineering, with scientific and technical responsibility distributed across all four campuses. UCLA Engineering Professor Kang Wang will serve as the director of the Institute, working closely with professors David Awschalom David Awschalom is an American condensed matter experimental physicist. He is best known for his work in spintronics in semiconductors. He was awarded the 2005 Oliver E Buckley Prize by the American Physical Society, and the 2005 Agilent Europhysics Prize by the European Physical at UCSB UCSB University of California at Santa Barbara UCSB University of Casual Sex and Beer , Jeff Bokor at UC Berkeley and Philip Wong at Stanford. All of the nearly 30 eminent researchers taking part in the Institute will explore critically needed innovations in semiconductor technology. The program will be co-managed by the four participating campuses and the semiconductor industry sponsors, with nearly 10 researchers from the semiconductor companies working with students and faculty on all of the university campuses. This close collaboration, with research and responsibilities shared by four campuses and six industry sponsors, represents an innovative model for cooperative research. "With this new institute, we are talking about an unprecedented opportunity to help define a technology that can exploit the idiosyncrasies of the quantum world to provide key improvements over existing technologies," Wang said. "As rapid progress in the miniaturization min·i·a·tur·ize tr.v. min·i·a·tur·ized, min·i·a·tur·iz·ing, min·i·a·tur·iz·es To plan or make on a greatly reduced scale. min of semiconductor electronic devices leads toward chip features smaller than 65 nanometers in size, researchers have had to begin exploring new ways to make electronics more efficient. Simply put, today's devices, which are based on complementary metal oxide semiconductor See CMOS. (integrated circuit) Complementary Metal Oxide Semiconductor - (CMOS) A semiconductor fabrication technology using a combination of n- and p-doped semiconductor material to achieve low power dissipation. standards, or CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. , can't get much smaller and still function properly and effectively. That's where spintronics comes in." The Western Institute of Nanoelectronics has been organized to leverage what are now considered the best interdisciplinary talents in the field of nanoelectronics in the world. The institute's mission is to explore and develop advanced research devices, circuits and nanosystems with performance beyond conventional devices, which are based on the current industry standard, CMOS. "Researchers in this institute want to not only look at physics and materials, but also explore devices, circuits and systems," says Wong. Stanford's other spintronics researchers include Shoucheng Zhang (physics and materials), Boris Murmann (circuits), Joachim Stohr (materials), Bruce Clemens (materials), Shan Wang (spin filters) and James Harris James Harris may refer to:
With IBM Fellow An IBM Fellow is an appointed position at IBM made by IBM’s CEO. Typically only 4 or 5 IBM Fellows are appointed each year, at the annual Corporate Technical Recognition Event (CTRE) event in May or June. Stuart Parkin Stuart Parkin FRS is a British experimental physicist at IBM's Almaden Research Center. Born in Watford, Parkin received his BSc degree in physics and theoretical physics from Trinity College, University of Cambridge in 1977. and Stanford Physics Professor Zhang, Electrical Engineering electrical engineering: see engineering. electrical engineering Branch of engineering concerned with the practical applications of electricity in all its forms, including those of electronics. Professor Harris will co-direct the IBM-Stanford Spintronic Science and Applications Center (SpinAps, for short). "The spintronics effort at Stanford is based upon the ongoing research collaboration with IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) through the SpinAps Center and the unique materials, characterization and device capabilities of the Stanford Synchrotron Radiation Laboratory The Stanford Synchrotron Radiation Laboratory, a division of Stanford Linear Accelerator Center, is operated by Stanford University for the Department of Energy. SSRL is a National User Facility which provides synchrotron radiation, a name given to x-rays or light produced by and the molecular beam epitaxy A technique that "grows" atomic-sized layers on a chip rather than creating layers by diffusion. labs at Stanford and IBM," Harris says. "Silicon semiconductor technology has provided the foundation for information technology for 50 years, but its limits are clearly in sight," says Jim Plummer, the Frederick Emmons Terman Dean of the School of Engineering at Stanford. "The Western Institute of Nanoelectronics is aimed at helping to define the successor to silicon CMOS technology. While it is not clear at this time that a successor even exists, we must search for it and this multiuniversity team is well positioned to do this. The discoveries they will make over the next few years will hopefully drive the information technology industry for many years to come." Spintronics relies on the spin of an electron to carry information, and holds promise in minimizing power consumption for next-generation electronics. Information-processing technology has relied so far on charge-based devices, ranging from vacuum tubes to million-transistor microchips. Conventional electronic devices simply move these electric charges around, ignoring the spin that tags along for the ride on each electron. Spintronics aims to put that extra spin action to work -- effectively corralling electrons into one smooth reactive chain of motion. The Western Institute of Nanoelectronics is being established with starting grants of $18.2 million: an industrial support total of $14.38 million and a matching $3.84 million UC Discovery Grant from the Industry-University Cooperative Research Program, which seeks to strengthen California's research-and-development economy in partnership with California research-and-development companies. The $18.2 million includes $2.38 million from a Nanoelectronics Research Initiative grant funded by six major semiconductor companies -- Intel, IBM, Texas Instruments, AMD (Advanced Micro Devices, Inc., Sunnyvale, CA, www.amd.com) A major manufacturer of semiconductor devices including x86-compatible CPUs, embedded processors, flash memories, programmable logic devices and networking chips. , Freescale and MICRON. The amount also includes an additional Intel grant of $2 million. The institute also will receive a separate $10 million equipment grant from Intel. These grants will ensure that long-range research is properly resourced to address the needs for semiconductor technologies beyond complementary metal oxide semiconductors. Funds will be distributed over a four-year period. Infrastructure and personnel support from the participating universities is estimated to exceed $200 million. Hans Coufal, director of the Nanoelectronics Research Corp., which has been chartered to implement the Nanoelectronics Research Initiative, said, "The participating companies are delighted to closely engage with some of the best scientists in this field and to provide support for their research towards the common objective, to extend Moore's Law "The number of transistors and resistors on a chip doubles every 18 months." By Intel co-founder Gordon Moore regarding the pace of semiconductor technology. He made this famous comment in 1965 when there were approximately 60 devices on a chip. for many more years to come." (Gordon Moore, one of Intel's founders, predicted in 1965 that innovative research would allow for a doubling of the number of transistors in a given space every year. In 1975, he adjusted this prediction to a doubling every two years.) A portion of the Western Institute of Nanoelectronics will be housed in new laboratories within the brand-new California NanoSystems Institute (CNSI CNSI California NanoSystems Institute (University of California at Santa Barbara) CNSI Committee on the Safety of Nuclear Installations CNSI Classified National Security Information (US) ) buildings currently under construction at UCLA and UCSB. Members of the new Institute also will take advantage of the Center for Spintronics and Quantum Computation, a CNSI research organization with coordinated scientific programs spanning universities around the world. The Western Institute of Nanoelectronics will use new infrastructures and laboratories of all the participating universities, including the Center for Information Technology Research in the Interest of Society of UC Berkeley, and the National Nanotechnology Infrastructure Network both at Stanford University and UCSB. "The long-standing partnerships that Intel has with California's great institutions of higher learning and research made it logical to team up with them in this new consortium, to establish a West Coast platform for exploratory science feeding into industry research and development," said Intel Fellow Paolo Gargini, director of technology strategy and chair of the Nanoelectronics Research Initiative Governing Council. "It is critical that we look farther out farther out Of or relating to an option contract with a later expiration date than a contract that is currently owned or being considered. For example, a contract with a May expiration date is farther out than a contract with a February expiration date of in such research to lay the groundwork for continuing Moore's Law, which is the foundation for the robust growth of our industry and the key role it plays in the economies of California and our nation. We appreciate the universities dedicating their pre-eminent intellectual capital and facilities to the effort, and the support of UC Discovery in helping to address the funding required to maintain leadership in semiconductor technology and manufacturing." |
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