Spotting interconnect defects: ICDs can't be reworked, but attempts to detect them are surprisingly minimal.

WELL, WE'RE IN trouble now. If voiding issues are not enough to keep everyone hopping, interconnect or interplane separation surely will be. Unlike voids, whereby if detected in time the panels can be reprocessed, it is impossible to rework ICD defects. And ICDs are not always detected by Quality Control. The main reason: ICDs rarely cause a catastrophic failure. Instead, constant thermal cycling or the high temperatures of assembly operations will cause a weakened interconnect to separate. Many engineers expect that performing one or two solder floats on plated coupons removed from panels will provide a sufficient QC check. Unfortunately, for the reasons cited, it does not.

FIGURE 1 shows an example of an ICD. One can detect a slight separation after the coupon was subjected to two solder floats at 550[degrees]C for 10 sec. Generally, if not seen by section, the panel would have easily passed electrical test. However, because of the weakness evident in the interconnect, continued thermal stresses and vibration of the PCB would most likely lead to an open. If in doubt about whether the defect is present, simply regrind and polish the potted coupon once again and inspect. Remember, inspect for ICD only after polishing the coupon; do not etch the specimen. When a specimen is etched, a line of demarcation is often visible with electroless copper deposits. Such a line may lead one to conclude that is a true ICD. It is imperative that unetched coupons be used to detect the presence or absence of the defect.

[FIGURE 1 OMITTED]

Certainly, an ICD is not confined to just the interplane. Blind vias can also exhibit a separation of the plated copper from the capture pad (more on this in a future column.)

Interconnect defect (IP separation) generally exhibits these underlying characteristics:

* Occurs during the stress of thermal shocks such as soldering. This produces expansion in the Z-axis and places strain on the hole-wall copper.

* Most often seen on the first interlayer from either side of the board (i.e., in a 12-1ayer board, the defect is seen on layers 2 and 11).

* The weakest bond breaks first.

* Undercured boards are most susceptible.

* Affected by board construction; PCBs with more resin, less copper and lower Tg materials tend to show more expansion in the Z-axis.

* ICDs are often accompanied by hole-wall pullaway, but not always.

Interplane separation has many possible causes. That is what makes this defect so difficult to pinpoint and eliminate. And to confuse the issue further, one must first determine which of the three types of IP it is.

The three types of IP separation arc:

* Separation of electroless copper deposit from the interconnect (Type 1).

* Separation of electrolytic copper deposit from electroless copper deposit but electroless remains on the post (Type 2).

* Cohesive failure of electroless copper deposit whereby the deposit actually separates from itself (Type 3).

FIGURES 2, 3 and 4 show the three types. Obviously, each type of failure has its own causes (our next column). Type 1 is the most common. Since this defect involves so many processes and additional insight into the desmear/electroless copper process, discussion on Type I will be deferred.

[FIGURES 2-4 OMITTED]

It is important to stress that Type 2 ICD is not an electroless copper/direct metalization/desmear problem. The electroless deposit as shown in Figure 2 lies firmly on the interconnect. The electrolytic copper bas separated from the electroless copper.

Basically, the root cause of such a defect is lack of adhesion between the electrolytic and electroless copper. When encountering this problem, the first step is to determine if the board was panel- or pattern-plated. If pattern-plated, ask if develop or resist residues remained on the interconnect. Was the develop solution at proper concentration, temperature and pH? Is there resist lock in? These problems will prevent electrolytic copper from adhering to electroless.

Other potential sources of Type 2 defect are oxidation at the interconnect and poor adhesion of dectroplated copper to electroless.

Oxidation is caused by long hold times between operations or rinsing with excessively hot water, in order to improve adhesion, a sufficient amount of copper must be microetched. Typically, a 15 to 20 microinch etch is sufficient. Concern arises when only 10 microinches or less of copper are removed. This is generally an insufficient amount of copper removal to provide enough anchoring sites for the copper plate. Many fabricators have reduced electroless copper plating thickness (to save cost) and are reluctant to be aggressive on the microetch. The result is poor or insufficient anchoring of the electrolytic copper to the electroless. The solution is simple: if your electroless copper process can not stand up to a microetch that removes 15 to 20 microinches, find one that does!

In August we'll discuss Type 1 and 3 ICD.

MICHAEL CARANO is vice president of sales and marketing at Electrochemicals (electrochemicals.com). He can be reached at mcarano@ electrochemicals.com.