Simulating a TDR: as long as you have access to any version of SPICE, you too can simulate a TDR.

THE MOST USEFUL tool for characterizing transmission line structures on a PCB is a time domain reflectometer, or TDR. It can provide a direct measure of the characteristic impedance of a uniform transmission line, its uniformity, time delay, effective dielectric constant and a rough measure of the excess capacitance or inductance of a discontinuity.

A TDR sends out a very fast step edge voltage signal and measures the voltage that reflects back as a function of time. The reflections occur whenever the instantaneous impedance the signal sees, changes.

Besides taking a TDR training class and getting hands-on experience, simulations of TDR measurements performed with a tool such as SPICE can help users boost their skill levels who don't have access to the real thing.

Simulating a TDR with SPICE is based on a very simple model for the TDR. It consists of an ideal pulsed voltage source, an ideal series resistor and the circuit model for the device under test (DUT). Any version of SPICE can be used to simulate a TDR. Here, a version of Berkeley SPICE is integrated into TDA Systems' IConnect.

The circuit diagram shown in FIGURE 1 features a DUT that's a simple uniform transmission line--an 85 characteristic impedance line. The ideal voltage source has a rise time of about 50 psec, depending on the TDR, and the source resistor is 50 [ohm] The first transmission line, used to provide a delay, is 50 [ohm]. The second transmission line is the DUT, 85 [ohm] in this case. The terminating resistor is 1 megaohm, modeling an open.

[FIGURE 1 OMITTED]

The actual TDR signal is the voltage measured at the node located between the 50 [ohm] source resistor and the first transmission line. The voltage at this spot is what would be displayed on the front screen of the TDR instrument.

FIGURE 2 shows the actual TDR measured response from a 6" length of an 85 [ohm] transmission line. The simplest model for this uniform transmission line is an ideal transmission line. FIGURE 3 shows a comparison between the simulated TDR response and the measured result. The simulated response (in green) is pretty good, but at the beginning there is a lot of agreement. Could this be non-uniformity in the transmission line? It's hard to tell just by looking at the measured data.

[FIGURES 2-3 OMITTED]

However, a common artifact in simulating a TDR is using an ideal linear ramp as the simulated incident voltage waveform. Even if the rise time is matched to the TDR, it still assumes a flat top to the incident wave.

But in practice, the rising edge of the incident signal into the DUT is rarely a linear ramp, and rarely an ideal Gaussian. It has a complex shape due to the losses and discontinuities in the cables and connectors leading up to the DUT. While some of these effects can sometimes be minimized when viewing the front screen with the normalization function found on some TDRs, another way of evaluating the impact from the non-ideal incident waveform is to use the actual waveform in the simulation, in a piecewise linear model.

The actual measured incident voltage waveform is recorded from the TDR when the DUT is an open, and this voltage verses time waveform is used in a piecewise linear voltage source. Otherwise, the circuit is the same. Using this model, FIGURE 4 shows the simulated response compared to the measured TDR response.

[FIGURE 4 OMITTED]

By using a piecewise linear model of the incident waveform, recorded from an open, a good approximation of the actual response expected from a real TDR can easily be seen by simulation using off-the-shelf simulation tools, such as SPICE.

DR. ERIC BOGATIN is the CTO of IDI and president of Bogatin Enterprises. He can be reached at [e-mail].