Simucad is a Popular Case Study for Textbooks About Verilog HDL.

Business/High Tech Editors

Design Automation Conference 2002

UNION CITY, Calif.--(BUSINESS WIRE)--June 11, 2002

Simucad's Silos III(R) logic simulation software for semiconductor technology design analysis and validation is featured in two recently published books about Verilog(R) HDL -- Verilog Quickstart (Third Edition) by James M. Lee and The Verilog Hardware Description Language (Fifth Edition) by Donald E. Thomas and Philip R. Moorby. Both publications, which provide fundamental and practical language instruction, are updated with comprehensive information about the new IEEE 1364-2001 Verilog standard features. A CD-ROM containing Simucad's Silos simulator accompanies each book to complement the subject matter. Among the Verilog 2001 enhancements featured in Silos are:

-- Generate statement

-- File I/O enhancements

-- Inclusion of attribute properties

-- Constraints for negative timing check

-- Definitions for ANSI C style ports, task and function I/O

-- Explicit in-line parameter passing

-- Comma separated sensitivity lists

-- Wild card for combinational logic sensitivity

"I am pleased to have a valuable resource as Silos III to supplement the material in my book, Verilog Quickstart," says James M. Lee. "It offers readers a chance to practice what they learn with a simulator, using up-to-date software with Verilog 2001 features and code coverage tools." Bob Floyd, president of Simucad, comments, "We are delighted that Silos III is considered an EDA industry model application for design synthesis and verification. We appreciate this academic testimony to our product's quality performance and reliability."

Published for students and professionals alike, Verilog Quickstart is priced at $98 (USD) and The Verilog Hardware Description Language retails for $108 (USD). Both books are printed by Kluwer Academic Publishers.

Advanced Digital Design with the Verilog HDL Available in August

Michael Ciletti's Advanced Digital Design with the Verilog HDL is scheduled for release by Prentice Hall in August. The book is written for advanced digital design courses and for design engineers who need to know how to use a hardware description language at key stages of a digital circuit design from verification to synthesis. Included with the text is Simucad's Silos III software, making this an invaluable hands-on learning environment.

Advanced Digital Design with the Verilog HDL has additional resources that will be available on the author's web site, including source files of models developed in the text examples, source files of testbenches for simulating the examples, solutions to selected problems, tutorials, ASIC standard cell library with synthesis and timing database, along with other helpful features.

About Simucad

Headquartered in Union City, CA, Simucad provides high-quality, affordable software tools for design-build systems utilizing the Verilog Hardware Description Language (Verilog-HDL). For almost twenty years, worldwide users in various industries have utilized Simucad's Silos and HyperFault products. For more information, contact Simucad at 510/487-9700 or via email at [e-mail]. Or, visit our website at www.simucad.com.

HyperFault, Silos and Simucad are registered trademarks of Simucad, Inc. Verilog is a registered trademark of Cadence Design Systems, Inc. All other trademarks and trade names are the property of their respective owners and are hereby acknowledged.