Simtek Adopts Mentor Graphics Calibre xRC for Parasitic Extraction, Cites Optimized Hierarchical Netlisting Capability.

Business Editors/High-Tech Writers

WILSONVILLE, Ore.--(BUSINESS WIRE)--May 12, 2004

Mentor Graphics Corporation (Nasdaq:MENT) today announced that Calibre(R) xRC, Mentor's parasitic extraction solution for nanometer design, has been adopted by Simtek Corporation for its high-performance nonvolatile memory designs. Calibre xRC was chosen for its ability to output optimized hierarchical parasitic data for signal and power net analysis, and for its integration with Nassda's post-layout hierarchical simulation tool, HSIM. Calibre xRC is the first and only parasitic extraction tool to meet the stringent demands of nanometer technologies.

"Previous extraction tools flattened the data and made it impossible for us to simulate effects of parasitics in large designs," said David Still, vice president of engineering for Simtek. "Calibre xRC quickly produced a compact hierarchical netlist that allowed us to validate and simulate our design using the hierarchical simulation tools in our design flow."

Calibre xRC offers transistor-level parasitic extraction for accurate modeling of nanometer designs. It is integrated into many design and simulation flows, allowing designers to work in their native frameworks while providing the accuracy and performance required for complex nanometer analysis.

"Providing parasitic data hierarchically for back annotation to source netlists is a unique capability to Calibre xRC extraction. Calibre xRC DSPF data formats and extraction methods have been optimized for Nassda's preferred hierarchical simulation flow for both signal and power network analysis," said Graham Bell, senior director of marketing, Nassda. "With this flow, our mutual customers can realize high accuracy and enhanced performance during hierarchical extraction and simulation of large nanometer designs, and because of much greater capacity, be able to perform post-layout analysis that was previously impossible to achieve."

"Enabling hierarchical netlisting is one of the goals of our nanometer silicon modeling initiative," said Joe Sawicki, vice president and general manager of the design-to-silicon division at Mentor Graphics. "In collaborating with Nassda, we have developed a robust solution for Simtek's transistor-level extraction and simulation dilemma for large designs. The combination of Calibre xRC and the HSIM family of products gives designers a unique hierarchical approach for the analysis of post-layout effects for signal, and power net analysis."

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $675 million and employs approximately 3,700 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314; World Wide Web site: http://www.mentor.com/.

Mentor Graphics and Calibre are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.