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Silicon Laboratories Introduces Industry's First Jitter Attenuating 10 Gbps XFP Transceiver IC; Si5040 Offers Small Size, Low Jitter and Low Power for XFP Optical Module Applications.


AUSTIN, Texas -- Silicon Laboratories Inc. (Nasdaq:SLAB), a leader in high-performance, analog-intensive, mixed-signal ICs, today announced the Si5040, the latest addition to the company's SiPHY(R) family of high-speed physical layer products. The Si5040 leverages Silicon Laboratories' proven DSPLL(R) technology to create the industry's first 10 Gbps XFP transceiver The XFP (10 Gigabit Small Form Factor Pluggable) is a hot-swappable, protocol-independent optical transceiver, typically operating at 850nm, 1310nm or 1550nm, for 10 Gigabit per second SONET/SDH, Fibre Channel, gigabit Ethernet, 10 gigabit Ethernet and other applications, including  IC with integrated jitter A flicker or fluctuation in a transmission signal or display image. The term is used in several ways, but it always refers to some offset of time and space from the norm. For example, in a network transmission, jitter would be a bit arriving either ahead or behind a standard clock cycle  attenuating capability on both transmit and receive data paths. With a package size of only 5 x 5 mm, the Si5040 is the industry's smallest solution offering low power and low jitter for space-constrained XFP XFP 10 Gigabit Small Form Factor Pluggable Module
XFP Extra-Fine-Pitch
XFP Ten Gigabit Small Form Factor Pluggable
 applications. Additionally, the Si5040 is the only transceiver to support continuous operation with jitter attenuation Loss of signal power in a transmission.
Attenuation

The reduction in level of a transmitted quantity as a function of a parameter, usually distance. It is applied mainly to acoustic or electromagnetic waves and is expressed as the ratio of power densities.
 across all telecom and datacom protocols between 9.9 and 11.4 Gbps, including OC-192/STM-64, 10 GbE, 10G Fiber Channel and their corresponding forward error correction A communications technique that can correct bad data on the receiving end. Before transmission, the data are processed through an algorithm that adds extra bits for error correction. If the transmitted message is received in error, the correction bits are used to repair it.  (FEC See forward error correction.

FEC - Forward Error Correction
) data rates.

Achieving best-in-class jitter performance, the Si5040 uses Silicon Laboratories' patented DSPLL technology to reduce jitter on 10 Gbps serial data streams that have been degraded by system level noise sources on either the network side or the port card. This revolutionary new transceiver architecture provides industry-leading transmit jitter generation of 2.5 mUI RMS while eliminating the need for external jitter clean up circuitry inside the module or on the port card. Applying DSPLL technology in the receive path minimizes receive data jitter to ensure error-free operation with port card ASICs or FPGAs.

The Si5040 uses an innovative receiver circuit that automatically adjusts data recovery parameters to optimize bit-error-rate (BER (1) (Basic Encoding Rules) A set of encoding rules for ASN.1 notation, which is a method for defining data structures. See ASN.1.

(2) (Bit Error Rate) The average number of bits transmitted in error. See BERT.

1.
) performance ensuring robust operation in unpredictable multi-vendor network environments over a wide range of channel conditions. Receiver performance is optimized by using an internal signal quality monitor to drive real-time adjustment of the decision threshold so that BER performance and jitter tolerance is maximized. The Si5040 also supports manual adjustment of the receiver decision threshold and sampling phase for custom BER optimization algorithms. Regardless of receiver operating mode, the superior input sensitivity (5 mV pk-pk differential typical) of the Si5040 makes it idea for both short and long reach applications.

"The Si5040 continues to deliver on Silicon Laboratories' commitment to providing innovative solutions to the networking industry by leveraging our industry leading DSPLL technology," said Dave Bresemann, vice president of Silicon Laboratories. "By combining jitter attenuation capability together with a sophisticated receiver architecture, we are greatly simplifying the task of achieving true SONET/SDH performance in XFP module applications."

The Si5040 XFP transceiver offers the industry's most complete feature set including support for three types of analog and digital signal quality monitors including analog loss-of-signal (LOS) detection, consecutive identical digit (CID Cid or Cid Campeador (sĭd, Span. thēth kämpāäthōr`) [Span.,=lord conqueror], d. 1099, Spanish soldier and national hero, whose real name was Rodrigo (or Ruy) Díaz de Vivar. ) detection and a proprietary digital measure of receive data eye opening. The Si5040 also simplifies system level test and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  by offering line loop-back, XFI loop-back and PRBS PRBS Pseudo-Random Binary Sequence
PRBS Pseudo Random Bit Sequence
PRBS Pseudorandom Bit Stream (Hekimian)
PRBS Probability Random Bit Sequence
PRBS Pseudo Random Bit Stream
 pattern generation and checking on both transmit and receive data paths. Complete device configuration and status monitoring is available through a serial microcontroller interface supporting commonly used protocols such as I2C I2C Inter-Integrated Circuit
I2C Intelligent Interface Controller
I2C Intelligent Controller
.

To support the industry's need for low power solutions, the Si5040 consumes less than 575 mW typical. The Si5040 further simplifies power management by operating over a wide power supply variation from +5% to -10% and provides additional power savings through programmable signal swings on all high-speed outputs. By operating over the full industrial temperature range (-40 degrees C to +85 degrees C), the Si5040 accommodates demanding module thermal conditions.

Pricing and Availability

The Si5040 is available in a 5 x 5 mm, lead-free, RoHS-compliant, 32-pin quad flat no-lead (QFN QFN Quad Flat No-Lead
QFN Queen Fan Newsletter (rock band)
QFN Quad Flat No Leads
) package. Samples are available now with production scheduled for the second quarter of 2006. Pricing for the Si5040 is $38.25 in quantities of 1k.

Silicon Laboratories Inc.

Silicon Laboratories Inc. is a leading designer of high-performance, analog-intensive, mixed-signal integrated circuits (ICs) for a broad range of applications. Silicon Laboratories' diverse portfolio of highly-integrated, patented solutions is developed by a world-class engineering team with decades of cumulative expertise in cutting-edge mixed-signal design. The company has design, engineering, marketing, sales and applications offices throughout North America North America, third largest continent (1990 est. pop. 365,000,000), c.9,400,000 sq mi (24,346,000 sq km), the northern of the two continents of the Western Hemisphere. , Europe and Asia. For more information about Silicon Laboratories, please visit www.silabs.com.

Cautionary Language

This press release may contain forward-looking statements based on Silicon Laboratories' current expectations. These forward-looking statements involve risks and uncertainties. A number of important factors could cause actual results to differ materially from those in the forward-looking statements. Silicon Laboratories believes that it is important to communicate the company's future expectations to investors. However, there may be events in the future that Silicon Laboratories is not able to accurately predict or control. For a discussion of these and other factors that could impact Silicon Laboratories' financial results and cause actual results to differ materially from those in the forward-looking statements, please refer to Silicon Laboratories' recent filings with the SEC, particularly the Form 10-KA filed April 25, 2005 and the 10-Q filed October 24, 2005.

Note to editors: Silicon Laboratories, DSPLL and the Silicon Laboratories logo are trademarks of Silicon Laboratories Inc. All other product names noted herein may be trademarks of their respective holders. In the term "I2C," the "2" is a superscript Any letter, digit or symbol that appears above the line. For example, 10 to the 9th power is written with the 9 in superscript (109). Contrast with subscript.  numeral numeral, symbol denoting anumber. The symbol is a member of a family of marks, such as letters, figures, or words, which alone or in a group represent the members of a numeration system. . It was changed for transmission purposes only.
COPYRIGHT 2006 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2006, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Jan 16, 2006
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