STMicroelectronics Unveils 32-bit Smartcard Platform with Direct Java-TM- Bytecode Execution.GENEVA--(BUSINESS WIRE)--Nov. 16, 1999-- "Best of both worlds" smartcard platform combines optimized Java Card engine and powerful native RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. instruction set for cryptography and OS support STMicroelectronics (NYSE NYSE See: New York Stock Exchange : STM (Scanning Tunneling Microscope) A microscope that can image down to the atomic level. An STM uses a piezoelectric tube with a tiny sharp tip at the end that is moved within nanometers of the object being sampled. ), the world's number one supplier of microcontroller-based smartcard chips, has announced a 32-bit platform for next-generation, multi-application smartcards that combines direct execution of Java bytecodes with a powerful native RISC instruction set. Known as SmartJ, the new platform offers significant performance advantages over alternative approaches that emulate the Java instruction set, while retaining the benefits of native RISC mode for cryptographic and operating system support. The SmartJ platform also includes a radical new development methodology that allows rapid product development without compromising security. The smartcard industry is currently undergoing a paradigm shift A dramatic change in methodology or practice. It often refers to a major change in thinking and planning, which ultimately changes the way projects are implemented. For example, accessing applications and data from the Web instead of from local servers is a paradigm shift. See paradigm. , from a purely vertical segmentation, where each smartcard is dedicated to a particular single application such as bank card, mobile phone SIM card or health card, to a market where the functionalities of multi-application cards are defined in horizontal terms such as Electronic Commerce, Access Control or Transportation Systems and the applications operate over open networks and architectures. "The smartcard platform of the future will have to support application downloading after the card is issued and comply with worldwide standards, while continuing to meet the perennial smartcard challenge of supplying the highest appropriate level of security at the lowest possible cost. By working with a variety of partners such as card manufacturers, operating system suppliers and service providers, we have achieved this challenging target," said Maurizio Felici, Group Vice President and General Manager of ST's smartcard business unit. SmartJ is ST's proprietary implementation of the open platform developed by the MASSC MASSC Metal Arts Society of Southern California (Multi-Application Secure Smart Card) project (project A112) initiated in November 1997 by MEDEA Medea (mĭdē`ə), in Greek mythology, princess of Colchis, skilled in magic and sorcery. She fell in love with Jason and helped him, against the will of her father, Aeëtes, to obtain the Golden Fleece. (Microelectronics Developments for European Applications), a European programme of pre-competitive collaborative R&D. At the heart of the SmartJ platform is the ST22 microprocessor, a 32-bit RISC architecture specifically developed to provide very fast execution of Java, the programming language that has emerged as a popular choice for downloaded applications programs ("applets"). The ST22 achieves this by augmenting its own highly efficient native RISC instruction set with a hardware decoder that directly converts Java bytecodes into native microcode A set of elementary instructions in a complex instruction set computer (CISC). The microcode resides in a separate high-speed memory and functions as a translation layer between the machine instructions and the circuit level of the computer. instructions, thus eliminating the overheads inherent in "virtual machine" emulation techniques. This results not only in very fast Java execution but also in reduced power consumption, a key benefit in contactless applications where the smartcard is powered only by energy extracted from the radio-frequency signals transmitted by the card reader. The processor core is complemented by on-chip ROM, RAM and up to 128K Bytes of EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting. , as well as a set of standard peripheral circuits and custom plug-in circuits. An ISO (1) See ISO speed. (2) (International Organization for Standardization, Geneva, Switzerland, www.iso.ch) An organization that sets international standards, founded in 1946. The U.S. member body is ANSI. 15408 (Common Criteria) certified embedded library is available for memory and standard peripheral drivers. Logical and physical security mechanisms are fully integrated into the silicon. For example, a hardware memory protection unit provides highly secure control over how a program can access various regions of memory, while other built-in mechanisms protect against external physical attacks. Another key benefit of the SmartJ platform is the open, modular architecture that not only supports downloading of interoperable applications after the card has been issued but also allows the detailed implementation of the card Including the cryptographic functions, the amount of embedded memory and optional customer-specific hardware and software Intellectual Property - to be tailored to the exact requirements of the application, thus allowing the card cost to be minimized. SmartJ also includes a new development methodology that allows customers to significantly reduce the time and cost of developing secure applications. The new methodology not only supports time-to-market factors such as concurrent development of hardware and software, multiple development teams and IP reuse but also security evaluation according to Common Criteria and the use of formal methods for security assurance through executable high-level specifications and model checking techniques. For implementing cryptographic algorithms, including Public Key and Secret Key types, an embedded library of specialized mathematical functions is provided. The SmartJ silicon is supported by a comprehensive Integrated Development Environment See IDE. integrated development environment - interactive development environment , including SmartJ code generation tools (C, C++ and Java compilers and an assembler/linker), a SmartJ instruction set simulator An Instruction Set Simulator (ISS) is a simulation model, usually, but by no means always, coded in a high-level language, which mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's , a cycle assurance simulator and C, C++, Java and assembler source level debuggers, as well as a JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group debug port with In-Circuit Emulation. About STMicroelectronics STMicroelectronics (formerly SGS-THOMSON Microelectronics) is a global independent semiconductor company, whose shares are traded on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. , on the ParisBourse and on the Milan Stock Exchange Milan Stock Exchange The largest regional stock exchange in Italy, facilitating more than 90% of the country's trading volume. . The Company designs, develops, manufactures and markets a broad range of semiconductor integrated circuits (ICs) and discrete devices used in a wide variety of microelectronics applications, including telecommunications systems, computer systems, consumer products, automotive products and industrial automation and control systems. Further information on ST can be found at www.st.com. |
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