Renesas Technology to Develop New CPU Architecture for Microcontrollers.The Next-Generation Architecture Will Combine the Features of the Existing H8 and M16C Cores along with Other New Technologies, Delivering a Powerful, Comprehensive Solution for 16- and 32-bit MCUs TOKYO -- Renesas Technology Renesas Technology Corporation (ルネサス テクノロジ| Corp. today announced that it is in the process of developing a new CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. architecture that will provide revolutionary enhancements over previous-generation microcontrollers (MCUs) in code efficiency(a)1, processing performance(MIPS/MHz), and power consumption. Based on the new architecture, Renesas will offer two CPUs to address 16- and 32-bit markets, while maintaining compatibility with Renesas' existing MCUs. The architecture will provide upgrade paths for both markets, delivering a powerful and compelling system solution for Renesas' MCU (1) (MicroController Unit) A computer on a single chip. See microcontroller. (2) (Multipoint Control Unit) A device that is used to moderate a videoconference of three or more end points (users at computers or groups of users customers. The new architecture will have innovative advances over the M16C and H8S 16-bit CPUs and R32C and H8SX 32-bit CPUs that Renesas Technology currently offers, while offering compatibility with the existing families in terms of CPU instruction sets, peripheral register sets and development tools. It will combine the excellent code efficiency of the M16C and R32C CPUs with the high-speed data processing data processing or information processing, operations (e.g., handling, merging, sorting, and computing) performed upon data in accordance with strictly defined procedures, such as recording and summarizing the financial transactions of a of the H8S and H8SX CPUs. Moreover, the new CPU architecture will further extend the low power consumption and low noise characteristics of both family lines. With these capabilities, Renesas aims to achieve the world's best overall performance considering code efficiency, processing performance (MIPS/MHz), power consumption and cost competitiveness. Code efficiency is especially important since it helps to minimize system program size and reduce overall system cost by allowing the use of less flash memory. By employing this new architecture, Renesas aims to reduce code size by 30% and CPU power dissipation CPUs (Central processing units) in their various incarnations consume some amount of electric power. This power is dissipated both by the action of the switching devices contained in the CPU (such as transistors or vacuum tubes) as well as energy lost in the form of heat due to the by 50%. "Renesas' broad MCU product offerings have been successful in the embedded market Refers to custom-designed, computer-based devices and applications that perform a fixed set of tasks. It may refer to cellphones and other handhelds, network appliances (routers, access points, modems) and myriad consumer electronics products. for many years, backed by powerful product development, field-proven manufacturing capabilities and a rich system-development environment," said Hideharu Takebe, board director and general manager, MCU business group, Renesas Technology Corp. "Renesas' MCUs have won over 10,000 designs annually, gaining accelerated acceptance in applications such as consumer products, automotive systems See ITS, embedded system, drive-by-wire, adaptive cruise control, collision avoidance system, autonomous vehicle, heads-up display, DSRC, lane departure system, CAN bus, FlexRay and SYNC. , industrial products, office equipment, and communication products. As a next step, we are developing next-generation CPUs for 16- and 32-bit markets under a single architecture, in response to the growing demand for both 16- and 32-bit MCU products. With this announcement, our present and future customers can be assured that Renesas is committed not only to supporting our existing MCU product families, but also to providing a solid upgrade path. Renesas continues to lead the MCU market by building on its global leadership. (No. 1 share(a)2 worldwide)" The project to develop the next-generation 16- and 32-bit CISC (Complex Instruction Set Computer) Pronounced "sisk." The traditional architecture of a computer which uses microcode to execute very comprehensive instructions. (a)3 CPUs is underway as Renesas celebrates the fourth anniversary of its establishment. The company plans to dedicate ded·i·cate tr.v. ded·i·cat·ed, ded·i·cat·ing, ded·i·cates 1. To set apart for a deity or for religious purposes; consecrate. 2. substantial resources to the project, and the new CPUs are expected to further expand the Renesas' MCU business. New CPU Development Devices incorporating CPUs based on the new architecture will scale from 16-bit to 32-bit CISC performance. They will be very easy to use and will shorten development times for system manufacturers. Moreover, by maintaining compatibility with existing products, the new CPUs will allow existing and future customers to preserve their engineering investments. Renesas' standard development environment, the High-performance Embedded Inserted into. See embedded system. Workshop, will also provide total support for the new CPUs as well as its existing MCUs. This will simplify the migration of software resources from the existing products to MCUs based on the new CPUs, and accelerate the development and debugging (programming) debugging - The process of attempting to determine the cause of the symptoms of malfunctions in a program or other system. These symptoms may be detected during testing or use by real users. of new software. To ensure that customers will have access to a wide selection of development tools, Renesas will continue to work with third-party companies and actively share information concerning the new architecture via the Web under Renesas' Alliance Partner Program. The company will continue to develop new products and provide support for customers using currently available MCU products. The specifications of the new CPUs will be released in early 2008 and the first devices with the new CPUs are expected to become available during Q2, CY2009 based on Renesas' 90nm flash MCU process. Devices for automotive applications are expected to be introduced after those for non-automotive applications, with the schedule determined by market requirements. For more information about the new CISC architecture, visit www.america.renesas.com/newmcucore About Renesas Technology Corp. Renesas Technology Corp. is one of the world's leading semiconductor system solutions providers for mobile, automotive and PC/AV (Audio Visual) markets and the world's No.1 supplier of microcontrollers. It is also a leading provider of LCD (Liquid Crystal Display) A display technology that uses rod-shaped molecules (liquid crystals) that flow like liquid and bend light. Unenergized, the crystals direct light through two polarizing filters, allowing a natural background color to show. Driver ICs, Smart Card microcontrollers, RF-ICs, High Power Amplifiers Power amplifier The final stage in multistage amplifiers, such as audio amplifiers and radio transmitters, designed to deliver appreciable power to the load. , Mixed Signal ICs, System-on-Chip (SoC), System-in-Package (SiP) and more. Established in 2003 as a joint venture between Hitachi, Ltd. (TOKYO:6501) (NYSE NYSE See: New York Stock Exchange :HIT) and Mitsubishi Electric Mitsubishi Electric Corporation (三菱電機株式会社 Corporation (TOKYO:6503), Renesas Technology achieved consolidated revenue of 953 billion JPY JPY In currencies, this is the abbreviation for the Japanese Yen. Notes: The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion. in FY2006 (end of March 2007). Renesas Technology is based in Tokyo, Japan and has a global network of manufacturing, design and sales operations in around 20 countries with about 26,500 employees worldwide. For further information, please visit http://www.renesas.com
Notes: 1. Code efficiency: an index of program compactness. The higher
the object code efficiency, the less memory is needed to
store programs.
2. Source: Garter Dataquest (March 2007) "2006 Worldwide
Microcontroller Vendor Revenue" GJ07168
3. CISC stands for "Complex Instruction Set Computer." This
type of CPU architecture boosts control processing
performance and code efficiency by using complex
instructions. CISC contrasts with RISC (Reduced Instruction
Set Computer), a type of CPU architecture designed to
increase data processing efficiency through the use of a
simplified instruction set and high-speed technology.
(a) Names of products, companies, and brands mentioned in this document are the trademarks or registered trademarks of their respective owners. |
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