Renesas Technology Introduces SuperH(R) Microprocessor That Supports Gigabit Ethernet for Network Devices and Digital Home Appliances.SAN JOSE, Calif. -- The High-Performance SH7763 Device Has a 2-Channel Gigabit Ethernet Controller and PCI Bus Controller to Enable High-Speed Data Transmissions Renesas Technology America, Inc. today announced a powerful 32-bit SuperH microprocessor for implementing gigabit connectivity for digital network products. The SH7763 microprocessor suits business products such as IT terminals, VoIP end-points, surveillance cameras, networking infrastructure equipment, and digital home appliances including media receivers, home servers, and PC peripherals. The new microprocessor incorporates an SH-4A dual-issue superscalar RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. core with a built-in floating point unit (FPU (Floating Point Unit) A computer circuit that handles floating point operations. FPU - floating-point unit ) for higher performance and precise real-time processing capabilities. The SH7763, for example, doubles its performance by achieving 478 million instructions per second Noun 1. million instructions per second - (computer science) a unit for measuring the execution speed of a computer's CPU (but not the whole system); "4 MIPS is 4,000,000 instructions per second" MIPS (MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. ), and 1.9 giga floating point operations per second (GFLOPS See gigaFLOPS. GFLOPS - gigaflops ) at the operating frequency of 266MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. . The 7-stage pipeline in the RISC core and the 10-stage pipeline in the FPU enable greater parallelism in instruction execution. The internal SuperHyway bus allows simultaneous transfers of data between memory and peripherals at high speeds. These architectural enhancements in the SH-4A will benefit multimedia and data-intensive applications, such as graphics and video. The instruction set from the new SH-4A core is fully upward compatible with the SH-4 architecture, allowing engineers to utilize existing programs and helps reduce system development time. The device also provides powerful on-chip functions, including a two-channel Gigabit Ethernet (GbE) controller supporting 10/100/1000 Mbps LANs, and PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). (Peripheral Component Interconnect See PCI. (hardware) Peripheral Component Interconnect - (PCI) A standard for connecting peripherals to a personal computer, designed by Intel and released around Autumn 1993. PCI is supported by most major manufacturers including Apple Computer. ) bus controller. The on-chip two-channel GbE controller supports the IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 802.3 compliant RMII RMII Reduced Media-Independent Interface RMII Rocky Mountain Internet Inc. (Reduced Media Independent Interface Reduced Media Independent Interface (RMII) is a standard that addresses the connection of Ethernet physical layer transceivers (PHY) to Ethernet switches. It reduces the number of signals/pins required for connecting to the PHY from 16 (for an MII-compliant interface) to 6 to 10. ) interface specification, so it can be used simultaneously with the on-chip 32-bit-wide PCI bus controller that supports the PCI Rev.2.2 standard. The SH7763's PCI bus interface allows seamless communication with IEEE802.11a/g/b compatible wireless LAN chips. When built into digital appliances, the SH7763 has sufficient processing throughput and on-chip hardware functionality to control the operation of that product, while simultaneously handling data traffic from connections to two Ethernet wired 10/100 Mbps LANs and a wireless LAN. By providing both 1000 Mbps (1 Gbps) high-speed LAN (Local Area Network) A communications network that serves users within a confined geographical area. The "clients" are the user's workstations typically running Windows, although Mac and Linux clients are also used. support and a high-performance CPU core, the microprocessor enables the fast network transfers essential for high-speed transmission and reception of movies and similar large-volume data. The security accelerator that the SH7763 provides performs high-speed encryption/decryption processing. It supports Data Encryption Standard See DES. Data Encryption Standard - (DES) The NBS's popular, standard encryption algorithm. It is a product cipher that operates on 64-bit blocks of data, using a 56-bit key. It is defined in FIPS 46-1 (1988) (which supersedes FIPS 46 (1977)). (DES), Triple DES (3DES), and Advanced Encryption Standard (cryptography, algorithm) Advanced Encryption Standard - (AES) The NIST's replacement for the Data Encryption Standard (DES). The Rijndael /rayn-dahl/ symmetric block cipher, designed by Joan Daemen and Vincent Rijmen, was chosen by a NIST contest to be AES. (AES) as data encryption methods, and Message Digest-5 (MD5) and Secure Hash Algorithm-1 (SHA-1) as authentication data generation methods. The device's two-channel moving-image-stream interface can handle high-speed transfer of the MPEG-2 TS (Transport Stream) transfer format and can connect to an MPEG-2 encoder/decoder chip. Secure transfer of digital content -- such as transmissions from terrestrial digital broadcasting systems -- is made possible by transmitting and receiving the streaming data on a network after performing encryption/decryption processing with the security accelerator on the SH7763. A double-data-rate (DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM. DDR - Double Data Rate Random Access Memory ) SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. interface integrated in the SH7763 facilitates the high-speed data processing by the SH-4A core and the high-speed data transfers by the GbE, PCI, and security accelerator. The SH7763 makes it possible to implement a highly integrated and high-performance system. Other on-chip SH7763 peripherals include a USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. interface, serial communication interface, audio CODEC interface, timers, MultiMediaCard interface, Direct Memory Access Controller (DMAC DMAC Direct Memory Access Controller DMAC Data Management and Communications DMAC N,N-Dimethylacetamide DMAC Downtown Media Arts Center (Orlando, Florida) DMAC Direct Memory Access Control DMAC Direct Machining and Control ), color-LCD controller, and more. Various well-proven development-environment tools are available for the new microprocessor. They include evaluation boards such as Hitachi ULSI (Ultra Large Scale Integration) More than one million transistors on a chip. See SSI, MSI, LSI and VLSI. Systems' Solution Engine, and the Renesas E10A-USB emulator. Maximum Operating Sample Price/ Product Name (part #) Frequency Package Availability ---------------------------------------------------------------------- SH7763 266MHz 449-pin BGA $30/October 2005 (R5S77630Y-266BGV) (21x21mm) ---------------------------------------------------------------------- About Renesas Technology Corp. Renesas Technology Corp. designs and manufactures highly integrated semiconductor system solutions for mobile, automotive and PC/AV markets. Established on April 1, 2003 as a joint venture between Hitachi, Ltd. (TOKYO:6501) (NYSE NYSE See: New York Stock Exchange :HIT) and Mitsubishi Electric Corporation (TOKYO:6503) and headquartered in Tokyo, Japan, Renesas Technology is one of the largest semiconductor companies in the world and the world's leading microcontroller supplier globally. Besides microcontrollers, Renesas Technology offers flash memories, system-in-package and system-on-chip devices, Smart Card ICs, mixed-signal products, SRAMs and more. www.renesas.com Notes: SuperH is a trademark of Renesas Technology Corp. Solution Engine is a registered trademark of Hitachi ULSI Systems Co., Ltd. in Japan. Other product names, company names, or brands mentioned are the property of their respective owners.
Specifications: Renesas Technology SH7763 32-bit RISC
Microprocessor With Gigabit Ethernet Support, Moving-Image-Stream
Interface, Etc.
Device (Product name) SH7763 (R5S77630Y-266BGV)
----------------------------------------------------------------------
Power supply voltage 1.2V (internal)/3.3V (external)/
2.5V (DDR-SDRAM interface)
----------------------------------------------------------------------
Maximum operating
frequency 266MHz
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Maximum processing
performance 478 MIPS, 1.9 GFLOPS (at 266MHz operation)
----------------------------------------------------------------------
CPU core SH-4A 32-bit RISC
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On-chip RAM 16 Kbytes
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Cache memory Instructions: 32Kbytes; Data: 32Kbytes
(4-way set associative)
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External memory/
external bus interfaces -- DDR-SDRAM memory controller
- DDR-SDRAM connectable with 32-bit bus
width
- Maximum operating frequency: 133MHz
-- Local bus state controller (BSC)
- SRAM, burst ROM, etc., directly
connectable
- 8/16-bit bus width, selectable
- Maximum operating frequency: 66MHz
-- PCI bus controller
- External PCI device connectable with
32-bit bus width
- 33MHz/66MHz operation possible
----------------------------------------------------------------------
On-chip peripheral
functions -- Gigabit Ethernet controller x 2 channels
-- Gigabit Ethernet controller DMAC x 4
channels
-- Moving image stream interface x 2 channels
-- Security accelerator (DES, 3DES, AES/MD5,
SHA-1)
-- Color-LCD controller
-- USB interface
- Host Ver. 1.1 (1.5Mbps/12Mbps)
- Function Ver. 2.0 (12Mbps)
-- General-purpose DMAC x 6 channels
-- Audio CODEC interface
-- I2C bus interface
-- Serial communication interface with FIFO
(SCIF) x 3 channels
-- Serial interface with FIFO (SIOF) x 3
channels
-- Serial sound interface (SSI) x 4 channels
-- SIM card interface
-- MultiMediaCard interface
-- PC card controller
-- 16-bit timer pulse unit (TPU)
-- Timer (TMU)
-- Compare-match timer (CMT)
-- Real-time clock (RTC)
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Package 449-pin BGA (21mm x 21mm)
----------------------------------------------------------------------
Notes: I2C bus (Inter IC Bus): An interface specification proposed
by Royal Philips Electronics of the Netherlands
MultiMediaCard is a trademark of the MMCA (MultiMediaCard
Association). Renesas Technology is a board member of MMCA.
http://www.mmca.org/.
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