Renesas Technology's SH7211F SuperH Single-Chip Microcontroller With On-Chip Flash Memory Achieves World's Fastest Operating Speed: 160MHz.SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif. -- The Excellent Real-Time Control Real-time control is a popular term for a certain class of digital controllers. For effective digital control, it is critical that sample time be constant. Real-time control achieves nearly constant sample time. See also
in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. Microcontroller's High-Performance SH-2A CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. Core Enables Advanced Designs of High-Quality Real-Time Control Systems for Industrial Equipment and Many Other Applications Renesas Technology Renesas Technology Corporation (ルネサス テクノロジ| America, Inc. today announced the SH7211F single-chip microcontroller (MCU (1) (MicroController Unit) A computer on a single chip. See microcontroller. (2) (Multipoint Control Unit) A device that is used to moderate a videoconference of three or more end points (users at computers or groups of users ) with on-chip flash memory, which features a fast SH-2A CPU core with excellent real-time control capability, a record-setting operating speed The operating speed of a road is the speed at which motor vehicles generally operate on that road. The precise definition of "operating speed", however, is open to debate. of 160MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. , and a processing capability of up to almost 320 MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. . The high-performance device -- an addition to the 32-bit RISC (reduced instruction set computer (processor) Reduced Instruction Set Computer - (RISC) A processor whose design is based on the rapid execution of a sequence of simple instructions rather than on the provision of a large variety of complex instructions (as in a Complex Instruction Set Computer). ) SuperH(R) family -- uses proprietary flash memory and circuit technologies and also has a superscalar A CPU architecture that allows more than one instruction to be executed in one clock cycle. See pipeline processing. (architecture) superscalar - A superscalar architecture is a uniprocessor that can execute two or more scalar operations in parallel. architecture that can simultaneously execute two instructions. It improves performance by a factor of 1.5 or more compared to previous Renesas MCUs with SH-2 CPU cores at the same frequency, or by a factor of about three when the 80MHz maximum operating frequency of SH-2 devices is considered. "As a result of the excellent capabilities and performance of the new device, system engineers can design embedded systems Embedded systems Computer systems that cannot be programmed by the user because they are preprogrammed for a specific task and are buried within the equipment they serve. that deliver more precise and faster control functions and faster software execution," said Peter Carbone, marketing director, system LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. business unit, Renesas Technology America. "A key application of the SH7211F is in industrial devices such as AC servos and general-purpose inverters that achieve enhanced operating efficiency. The MCU is also ideal for office automation and consumer products, among others." To accommodate complex and sophisticated application programs, the chip has a large-capacity 512Kbyte flash memory. In general, the operating speed of flash memory is theoretically slower than that of the logic circuitry in the CPU core, and is difficult to increase. However, the SH7211F is built with proprietary Renesas flash memory technology and uses innovative circuit techniques for the flash-memory cache circuitry. These factors combine to allow the SH7211F to produce virtually the same performance as when single-cycle accesses are performed at 160 MHz. Also, because the SH-2A CPU core improves ROM code efficiency, program size can be reduced by about 25 percent compared with code written for chips that have the SH-2 core. (Upward instruction compatibility is maintained with the SH-2 core.) The SH-2A CPU core is designed to attain an improved real-time capability. It incorporates 15 register banks specifically for interrupt use. The response time for handling an interrupt is only 6 cycles, compared to 37 cycles for the SH-2 core. This enhancement, coupled with the SH-2A's 160MHz operating frequency, cuts the program interrupt response time to approximately 1/12 of that of an SH-2 core operating at 80MHz. This ensures fast program switching when an interrupt event occurs, for much better real-time control. The SuperH device provides a rich selection of peripheral functions, making it possible to implement functionally advanced systems while reducing the number of external parts and making end products smaller and lower in cost. Specifically, the MCU offers two multifunction timer units (MTU (1) (Maximum Transmission Unit, Maximum Transfer Unit) The largest frame size that can be transmitted over the network. For example, an Ethernet MTU is 1,500 bytes. Messages longer than the MTU must be divided into smaller frames. 2 and MTU2S) with 3-phase pulse width modulation See PWM. (PWM (Pulse Width Modulation) A modulation technique that generates variable-width pulses to represent the amplitude of an analog input signal. Like its fixed-width pulse density modulation (PDM) cousin, the output switching transistor is on more of the time for a ) output capability for controlling AC servos or two motors simultaneously, as well as an 8-channel 12-bit A/D converter and a 2-channel 8-bit D/A converter that are useful for many industrial applications. The device also has a variety of communication functions, including a 4-channel serial communication interface with 16-stage FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods. FIFO - first-in first-out and an I2C bus interface. A bus state controller enables flash ROM, SRAM See static RAM. SRAM - static random-access memory , SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. , burst ROM, multiplex I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output , and others to connect directly to the MCU's external data bus. System development tools To aid system development, the SH7211F has on-chip debugging functions that enable real-time debugging at the maximum operating frequency. Supported Renesas development environments are the USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. bus-powered E10A-USB emulator, which doesn't require an external power supply, and the more capable E200F emulator, which allows real-time tracing to be carried out at the MCU's maximum operating frequency. Renesas also offers the High-performance Embedded Workshop, an integrated development environment See IDE. integrated development environment - interactive development environment with C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++ compiler, editor, and other functions. Additional software and hardware tools and services are available from the many independent vendors that support the devices in the SuperH series. Renesas Technology will continue to extend the SuperH MCU product line to meet evolving market needs. In planning are faster and more powerful models featuring higher operating frequencies, increased on-chip flash memory and RAM capacities, and enhanced peripheral functions. SoC (System on Chip) and SiP (System in Package) products using the SH-2A CPU core are also planned.
Pricing and Availability
Sample
Product Name Package Price/Availability
------------------ ----------------------------- ---------------------
SH7211F (part # 144-pin LQFP (20mm x 20mm) $19.84/available now
R5F72115)
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Reader contact Readers can find additional product and contact information on the Renesas Technology Web site at www.renesas.com. About Renesas Technology Corp. Renesas Technology Corp. is one of the world's leading semiconductor system solutions providers for mobile, automotive and PC/AV (Audio Visual) markets and the world's No.1 supplier of microcontrollers. It is also a leading provider of LCD Driver ICs, Smart Card microcontrollers, RF-ICs, High Power Amplifiers, Mixed Signal ICs, System-on-Chip (SoC), System-in-Package (SiP) and more. Established in 2003 as a joint venture between Hitachi, Ltd. (TOKYO:6501)(NYSE NYSE See: New York Stock Exchange :HIT) and Mitsubishi Electric Corporation (TOKYO:6503), Renesas Technology achieved consolidated revenue of 1002.4 billion JPY JPY In currencies, this is the abbreviation for the Japanese Yen. Notes: The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion. in FY2004 (end of March 2005). Renesas Technology is based in Tokyo, Japan and has a global network of manufacturing, design and sales operations in around 20 countries with about 26,000 employees worldwide. For further information, please visit http://www.renesas.com Note to Editors: A specification summary is included in this release, and a photo and block diagram of the SH7211F microcontroller are available. SuperH is a trademark of Renesas Technology Corp. Other product names, company names, or brands mentioned are the property of their respective owners.
Specifications: Renesas Technology SH7211F Microcontroller
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Item SH7211F
---------------------------- -----------------------------------------
Product name R5F72115
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Power supply voltage 1.5V (internal)/3.3V (external)
---------------------------- -----------------------------------------
Maximum operating frequency 160MHz
---------------------------- -----------------------------------------
Maximum processing 320 MIPS (at 160MHz operation)
performance
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CPU core SH-2A (without FPU)
---------------------------- -----------------------------------------
CPU instructions 91 (FPU-related instructions are not
included)
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On-chip RAM 32Kbytes
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External memory Bus clock frequency: Maximum 40MHz
-----------------------------------------
SRAM, SDRAM, and burst ROM,
directly connectable by bus state
controller (BSC)
-----------------------------------------
Address space: 64Mbytes x 8
-----------------------------------------
Provision for idle-cycle insertion to
prevent bus collisions
-----------------------------------------
Data bus width: External 8/16 bits
---------------------------- -----------------------------------------
On-chip peripheral functions Multifunction timer pulse unit 2 (MTU2)
Multifunction timer pulse unit 2S (MTU2S)
-----------------------------------------
A/D converter (12-bit resolution) x 8
channels
-----------------------------------------
D/A converter (8-bit resolution) x 2
channels
-----------------------------------------
Serial communication interface with FIFO
(SCIF) x 4 channels (asynchronous and
clock synchronous serial communication
capability)
-----------------------------------------
I2C bus interface(a) x 1 channel
-----------------------------------------
Compare-match timer (CMT) x 2 channels
-----------------------------------------
User break controller (UBC)
-----------------------------------------
On-chip debugging functions
-- Advanced user debugger (AUD)
-- User debug interface (H-UDI)
-----------------------------------------
Direct memory access controller (DMAC) x
8 channels
-----------------------------------------
Interrupt controller (INTC)
-----------------------------------------
Watchdog timer (WDT)
-----------------------------------------
Clock pulse generator (CPG) with built-in
multiplication PLL
---------------------------- -----------------------------------------
Power-down modes Sleep, Software standby, and Module
standby
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Package 144-pin LQFP (20mm x 20mm)
---------------------------- -----------------------------------------
(a) I2C-bus (Inter IC Bus) is an interface specification proposed by
Royal Philips Electronics of the Netherlands.
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