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Renesas Technology's SH-MobileL3V Multimedia Processor Enables Mobile Phones With Digital TV Broadcast Capabilities and VGA-Size Video.


SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif. -- The Device Has an On-Chip High-Performance Image Processing Engine The image processing engine, or image processor, is - next to the optics and the image sensor - one of the most important components of a digital camera and plays a vital role in creating the digital image.  for Video Recording and Playback, Plus a 5-Megapixel Camera-Module Interface and More

Renesas Technology Renesas Technology Corporation (ルネサス テクノロジ|  America, Inc., a subsidiary of the world's largest microcontroller supplier, Renesas Technology Corp. today announced the latest expansion of its popular SH-Mobile product line. The new SH-MobileL3V (product name: SH7354) is a multimedia processor designed specifically to bring terrestrial digital broadcast capabilities to mobile phones.

"This high-performance device is destined des·tine  
tr.v. des·tined, des·tin·ing, des·tines
1. To determine beforehand; preordain: a foolish scheme destined to fail; a film destined to become a classic.

2.
 to further accelerate the race to pack more and better TV and still-picture features into advanced mobile phones," said Brian Davis Brian Davis may refer to:
  • Brian Davis (golfer)
  • Brian Davis (basketball), American basketball player
  • Brian Davis (American football), American football player
  • Brian Davis, minor character in Heroes (see "Six Months Ago")
, director, advanced solutions group, Renesas Technology America, Inc. "The SH-MobileL3V multimedia processor is a key enabling component for new phone models that can utilize digital broadcasting services. Those services are being introduced in various countries throughout the world, boosting phone sales and wireless usage."

The SH-MobileL3V multimedia processor incorporates a VPU VPU Video Processing Unit
VPU Vice Presidential Unit (World Bank)
VPU Vicaría Pastoral Universitaria (Santiago, Chile)
VPU Vulnerable Prisoner Unit (UK) 
4 (Video Processing Unit 4) video processing IP with powerful multimedia capabilities. For example, in a phone for the Japanese market, the VPU4 IP can process terrestrial digital broadcasting signals compressed using the H.264/MPEG-4 AVC moving-image compression standard at a rate fast enough to encode and decode video at 30 frames per second at VGA (Video Graphics Array) The display standard for the PC. All PC display adapters support VGA, and Windows machines boot up in "VGA mode" before switching to higher resolutions.  definition. That performance makes possible smooth video display and recording, equivalent to that of a standard TV. The device also supports systems such as DVB-H See mobile TV and DVB.  (Digital Video Broadcast for Handhelds) in Europe and DMB (Digital Multimedia Broadcasting) See mobile TV.  (Digital Multimedia Broadcasting Digital Multimedia Broadcasting (DMB) is a digital radio transmission system for sending multimedia (radio, TV, and datacasting) to mobile devices such as mobile phones. ) in South Korea. Moreover, since the VPU4 IP can also handle MPEG-4 processing, the SH-MobileL3V can implement a variety of moving-image applications such as video mail, videophones, and video clips.

Other multimedia-oriented features of the device include a direct connection interface to a 5-megapixel-class camera module and a 24-bit LCD interface. The camera interface allows high-speed capture of high-definition image data and versatile image processing. It can perform electronic image zoom, screen overlapping, and more; has a hardware cursor function; and supports YUV The color encoding system used for analog television worldwide (NTSC, PAL and SECAM). The YUV color space (color model) differs from RGB, which is what the camera captures and what humans view.  data of BT.709 specifications. The latter makes it possible to extract TV broadcast data and convert it to a JPEG JPEG
 in full Joint Photographic Experts Group

Standard computer file format for storing graphic images in a compressed form for general use. JPEG images are compressed using a mathematical algorithm.
 image with no loss of image quality. The LCD interface supports a 16.78-million-color LCD panel. That capability, together with the SH-MobileL3V's high-image-quality compensation functions, enables the implementation of a variety of impressive displays. The chip also includes a sound interface and communication interfaces, as well as SD memory card and SIM card interfaces.

CPU CPU
 in full central processing unit

Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit.
 core and VPU4 IP work together, so power consumption can decrease

At the heart of the SH-MobileL3V chip is a SuperH(R) type SH4AL-DSP CPU core with cache memory, a direct memory access controller (DMAC DMAC Direct Memory Access Controller
DMAC Data Management and Communications
DMAC N,N-Dimethylacetamide
DMAC Downtown Media Arts Center (Orlando, Florida)
DMAC Direct Memory Access Control
DMAC Direct Machining and Control
) and a memory management unit (MMU (Memory Management Unit) The part of the computer that governs memory access. Either part of the CPU chip or housed on separate chips, the MMU controls memory partitions and virtual memory. See memory and virtual memory.

MMU - Memory Management Unit
) that achieves high processing performance: 389 MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second.  at its maximum operating frequency of 216MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. . This CPU core provides unit-frequency processing performance of 1.8 MIPS/MHz, sufficient for operating a browser with one-segment broadcasting or a similar digital-TV capability. Moreover, the fact that the VPU4 IP performs almost all video processing by hardware frees up the CPU to execute software-based computations and control activities. This division of tasks can allow the design of mobile phones that use lower clock frequencies for decreased power consumption and extended battery life.

The SH-MobileL3V multimedia processor is packaged in a compact 281-pin CSP (1) (Certified Systems Professional) An earlier award for successful completion of an ICCP examination in systems development. See ICCP.

(2) (Commerce Service P
 (chip-scale package: 9mm x 11mm x 1.4mm, with 0.5mm pin pitch). In a typical mobile phone, the device connects to the baseband LSI LSI: see integrated circuit.


(Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI.
 device and performs voice, video, or similar multimedia application processing. Dedicated interfaces allow easy connection to the baseband LSIs of various types of phones. This feature, combined with accelerator functions, system interfaces, and a power management function optimized for mobile phones, allows customers to quickly produce advanced models offering market advantages.

Price and Availability
Sample Unit Price
                                                      for 10,000 Unit
Product Name        Operating Frequency    Package    Lot/Availability
------------------- -------------------- ----------- -----------------
SH-MobileL3V:
SH7354 (R8A73540BG)        216MHz        281-pin CSP $21/ August 2006
------------------- -------------------- ----------- -----------------


Reader contact

Readers can find additional product and contact information on the Renesas Technology Web site at www.renesas.com.

About Renesas Technology Corp.

Renesas Technology Corp. designs and manufactures highly integrated semiconductor system solutions for mobile, automotive and PC/AV markets. Established on April 1, 2003 as a joint venture between Hitachi, Ltd. (TOKYO:6501) (NYSE NYSE

See: New York Stock Exchange
:HIT) and Mitsubishi Electric Corporation (TOKYO:6503) and headquartered in Tokyo, Japan, Renesas Technology is one of the largest semiconductor companies in the world and the world's leading microcontroller supplier globally. Besides microcontrollers, Renesas Technology offers flash memories, system-in-package and system-on-chip devices, Smart Card ICs, mixed-signal products, SRAMs and more.

www.renesas.com

Note to Editors: A specification summary is included in this release, and a photo and block diagram of the SH-MobileL3V multimedia processor are available.

Notes: SuperH is a trademark of Renesas Technology Corp. Other product names, company names, or brands mentioned are the property of their respective owners.

Specifications: Renesas Technology SH-MobileL3V Multimedia Processor -- Solution for Mobile Phones with Digital TV broadcast Capabilities
Item                   SH-MobileL3V
---------------------- -----------------------------------------------
Product Name (part #)  SH7354 (R8A73540BG)
---------------------- -----------------------------------------------
CPU core               SH4AL-DSP
---------------------- -----------------------------------------------
Power supply voltage   Internal: 1.15V to 1.3V
                       External: 2.5V to 3.3V or 1.65V to 1.95V
---------------------- -----------------------------------------------
Maximum operating
 frequency             216MHz
---------------------- -----------------------------------------------
Maximum processing
 performance           389 MIPS (at 216MHz operation)
---------------------- -----------------------------------------------
On-chip RAM            2Kbytes
---------------------- -----------------------------------------------
Cache memory           Separate 32Kbytes for instructions and 32Kbytes
                        for data; 4-way set-associative type
---------------------- -----------------------------------------------
X/Y memory (for DSP)   16 Kbytes
---------------------- -----------------------------------------------
On-chip peripheral     --  5-Megapixel camera support functions
 functions             --  VPU4 (H.264, MPEG-4 full hardware
                           accelerator)
                       --  DMAC x 6 channels
                       --  MMU
                       --  24-bit TFT color liquid crystal compatible
                           LCD controller
---------------------- -----------------------------------------------
Interfaces             --  Dedicated interface (baseband LSI
                           connection, etc.)
                       --  TS (Transport Stream) interface
                       --  4-Gbit NAND/AND flash memory interface
                       --  Video I/O (camera-module direct-connection
                           interface)
                       --  I2C bus(a) interface
                       --  Synchronous serial interface x 1 channel
                       --  SIM card interface
                       --  Serial interface with FIFO x 1 channel
                       --  Asynchronous serial interface x 1 channel
                       --  Sound interface unit x 1 channel
                       --  SD memory card interface
---------------------- -----------------------------------------------
Package                281-pin CSP (9mm x 11mm x 1.4mm, 0.5mm pin
                        pitch)
---------------------- -----------------------------------------------


(a) I2C bus (Inter IC Bus) is an interface specification proposed by Royal Philips Electronics of the Netherlands.
COPYRIGHT 2006 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2006, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Geographic Code:9JAPA
Date:Jul 11, 2006
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