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REMINDER/Accellera Holds Open Member Meeting With Verification Focus.


Business Editors/High-Tech Writers

REMINDER... for Monday (March 4)

--(BUSINESS WIRE)

ECSI ECSI Export Cargo Shipping Instruction
ECSI EarthKeeper Center for Self Improvement
ECSI Early Childhood Systems Initiative
 Co-Sponsors Meeting and Invites Its Members to Attend,

Monday, March 4, 6pm 15, Le Palais Le Palais (Breton: Porzh-Lae) is a French commune located in the Morbihan département, in the Bretagne région.

It is one of the four communes on the island Belle Île.
 des Congres, Paris, France

Who:

Accellera (www.accellera.org), the EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  organization focused on language-based design standards Design standards

Specifications of materials, physical measurements, processes, performance of products, and characteristics of services rendered. Design standards may be established by individual manufacturers, trade associations, and national or
 invites the electronic design community to attend its open member meeting at DATE (www.date-conference.com) in Paris, France. The European Electronics Chips and Systems Design Initiative (ECSI) is a co-sponsor of this meeting.

ECSI (www.ecsi.org) was established in 1993 with support of European Commission European Commission, branch of the governing body of the European Union (EU) invested with executive and some legislative powers. Located in Brussels, Belgium, it was founded in 1967 when the three treaty organizations comprising what was then the European Community  via the ESPRIT ESPRIT - European Strategic Programme for Research in Information Technology  project ECIP ECIP European Community Investment Partners
ECIP Early Childhood Intervention Program
ECIP Erasure Code Internet Protocol
ECIP Energy Conservation Improvement Program
ECIP European Compliance Inspection Program
ECIP Energy Conversion Investment Program
 and sponsorship of participating companies, and is open to all institutions or industries, who wish to support EDA standardization in Europe. ECSI's mission is to identify, develop and promote efficient methods for electronic systems design, with particular regards to the needs of the system-on-chip.


      What:

Presentations:  About Accellera,
                 Michael (Mac) McNamara,
                 Accellera Vice Chairman

                Verification Committee Efforts,
                 Harry Foster,
                 Accellera Technical Subcommittee Chairman

Panel:          The Verification of Platforms -- a user's view

     Moderator: Vassilios Gerousis,
                 Accellera's Technical Committee Chairman

     Panelists: Dr. Mark Burton Senior R&D Engineer, ARM
                Klaus Kronlof, Principal Scientist, Nokia
                Philippe Magarshack, Central R&D Group VP,
                 Design Automation, STMicroelectronics


About the Presentations and Panel

Verification continues to be a critical portion of the design cycle. Recently, new verification techniques have been proposed and developed, which promise to improve verification coverage and accelerate the verification design step. Accellera with the help of industry leaders in verification is working on developing standards that allow users and tool developers to take optimal advantage of these new concepts and methodologies.

The verification of platforms requires that many principles be utilized for individual components of the platform, with interaction between the components. For example, these include the use of directed random techniques, assertions that check key protocols on busses and between intellectual property blocks, the checking of software quality and the testing of software and hardware together. These are all essential elements of an effective platform verification strategy. Also, worthy of consideration is the analysis of algorithmic and system implementation level models and the validation of downstream designs against these higher level descriptions.


When and Where:
Monday, 4 March 2002, 6pm-7pm, Room D (252B)
Le Palais des Congres, Paris, France

Registration:
The meeting is open to all.


About Accellera

Accellera is an electronics industry organization that drives the worldwide development and use of standards required by systems, semiconductor and design tool companies that enhance a language-based design automation process. This includes support of technical groups involved with development of standards for the IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields.  1364 Verilog HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards.  standard and the IEEE 1076 VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  standard. For more information visit www.accellera.org.

Note to Editors: Accellera acknowledges trademarks or registered trademarks of other organizations for their respective products and services.
COPYRIGHT 2002 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2002, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Mar 4, 2002
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