REMINDER/Accellera Co-Sponsors and Supports the FDL with SystemVerilog Sessions, Invites European Design Community to Attend.

Business Editors/High-Tech Writers

REMINDER...for Tuesday-Friday (Sept. 23-26)

FORUM on Specification & Design Languages

--(BUSINESS WIRE)

Who

Accellera, the EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. organization focused on language-based design standards Design standards

Specifications of materials, physical measurements, processes, performance of products, and characteristics of services rendered. Design standards may be established by individual manufacturers, trade associations, and national or , invites the electronic design community to attend the FORUM on Specification & Design Languages (FDL FDL Free Documentation License
FDL FireDogLake (website)
FDL Fond du Lac (Wisconsin, US)
FDL Facilities Data Link
FDL Facility Data Link
FDL File Definition Language
FDL Flexor Digitorum Longus '03) in Frankfurt, Germany and attend the Hardware Description and Verification Language (HDVL HDVL Hab Dich Voll Lieb (German) ) sessions about SystemVerilog.

What

Several members of Accellera's HDVL team will present an Overview of SystemVerilog, as well as a User Perspective.

When

1400-1530, 24 September SystemVerilog Overview

1600-1730, 24 September SystemVerilog In Use

Where

FDL takes place at the casino casino or cassino (both: kəsē`nō).

1 Card game played with a full deck by two to four players. Its origins are obscure though it probably traces back to the Italian game of Scopa. of the famous "Poelzig Building" in Frankfurt, Germany. For directions, please visit http://www.ecsi-association.org/ecsi/fdl/fdl03/venue.htm.

Information

Please visit http://www.ecsi-association.org/ecsi/fdl/fdl03/home.htm for more information. For more information on SystemVerilog, please visit www.systemverilog.org.

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Publication:	Business Wire
Date:	Sep 23, 2003
Words:	151
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