Quickturn Introduces EDA Industry's First Fully Integrated Cycle-Based Verification Solution.

SAN JOSE, CALIF.--(BUSINESS WIRE)--June 21, 1999--

PowerSuite Integrates Software Simulation and Hardware

Emulation Engines in Easy-to-Use Environment for Rapid

Verification of Complex ICs and SOCs

Quickturn, a Cadence Company (NYSE:CDN), today introduced PowerSuite(tm), the electronic design automation (EDA) industry's first, fully integrated cycle-based verification solution, combining industry-leading emulation and simulation tools in an extensible, multiple-engine methodology. PowerSuite provides a complete Verilog or VHDL functional design verification flow for complex integrated circuits and systems from 5-million to 200-million gates. PowerSuite is uniquely suited to the verification needs of designers creating supercomputers and parallel processing computers, telecommunications/data communications infrastructure equipment, and system on chip (SOC) applications.

PowerSuite fully integrates the SpeedSim(tm) cycle-based simulator with the CoBALT(tm) Plus emulation system using its accelerated simulation engine to offer 100 percent compatibility for designs modeled in either the simulator or the emulator. PowerSuite includes MegaSim(tm), a new option to SpeedSim, which allows a designer, on a single workstation, to simulate up to 200-million-gate designs that contain multiple instantiations of hierarchical blocks. The entire package can simulate designs and testbenches at speeds in the hundreds of kHz for blocks up to 20 million gates. PowerSuite includes CoBALT Plus and SpeedSim, as well as the StyleCheck(tm) design analysis tool, PowerBench(tm), a new tool for testbench modeling, HDL-ICE(tm) for fast RTL mapping of VHDL designs, and supports hierarchical and modular design styles.

"Quickturn, with PowerSuite, has realized the true potential of cycle-based verification that other companies have attempted over the years. It is, in fact, a key reason why we acquired SpeedSim," said Keith Lobo, Chief Executive of Quickturn and Senior Vice President of Cadence. "Designers can now benefit from a selection of engines and debugging options with one fully compatible and integrated set of verification products and methodologies for designs in the emerging nanometer silicon technology era. Quickturn is now uniquely positioned to deliver the highest performance, integrated verification tool suite in the industry, enabling our customers to meet their critical product development schedules on very high complexity designs."

"The PowerSuite environment with the CoBALT emulator is well aligned with the verification and system integration strategy we have picked for our next generation design," says Willis Hendley, Senior Engineering Manager in Sun Microsystems Workgroup Server unit. "We are impressed with the potential for great simulation throughput and fast turnaround times and a dramatic reduction in time to emulation. We are also pleased that this whole environment now runs on Sun workstations."

Single compiler targets simulation and emulation

PowerSuite features a single fast compiler that reads Verilog RTL code and gate-level input and maps the design to either SpeedSim or CoBALT. The compiler automatically converts two-dimensional memories and register files from Verilog RTL code. For VHDL, Quickturn's HDL-ICE fast mapping tool allows customers to convert their RTL designs into gate-level designs at rates 10 to 100 times faster than conventional silicon synthesis.

The common environment includes a single design database, a powerful debugging environment and support for multiple verification engines. The compiler can map RTL for simulation at 10-million gates per hour and 3-million gates per hour for super-fast hardware acceleration -- the fastest mapping rate in the industry. The new environment allows customers to debug their simulated/emulated designs (using breakpoints) in the RT level.

PowerSuite includes a unique "save/restore" feature that leverages the unified database. Designers can save the logic and memory states within CoBALT and restore them in SpeedSim on their desktop workstation to continue analyzing and debugging design issues found in CoBALT. This allows users to find bugs that are buried deep in the design that surface only after billions of cycles. Restoring the design on SpeedSim after hitting a breakpoint allows users to explore the bugs with traditional simulation methods, freeing the emulator for other regression tests.

PowerBench: A New Testbench Methodology

PowerSuite supports C and synthesizable testbenches and vectors, but also offers a new testbench methodology, embodied in the PowerBench co-verification toolkit. This set of productivity tools allows users to run C programs (representing the testbench) within the cycle-based verification environment at new levels of performance by modeling a special testbench processor core. PowerBench uses the same models and environment for both SpeedSim and CoBALT.

PowerBench enables full system simulation driven by C code at up to 400 kHz. PowerBench currently supports Sparc Lite and Digital Alpha CPU models and Quickturn will add future models to the toolkit based on customer demand.

PowerBench's environment offers direct access and debug of C programs while the design is being emulated. Programmers can use the standard GNU compiler/debugger and set up software breakpoints, while hardware designers are debugging the RTL design in parallel.

MegaSim: Simultaneous Block Evaluation

This new option allows users to take advantage of the unique SpeedSim architecture and provides a performance boost for large modular designs. When a large block is instantiated multiple times in a design, the MegaSim option automatically detects and maps them in a unique way that allows SpeedSim to evaluate up to 32 identical blocks in parallel using one license of SpeedSim on a single 32-bit workstation. Each bit executes the same logical operation from each different instantiation. This permits users to simulate designs as large as 200 million gates (MegaSim is the ONLY technology that efficiently compiles a design of this size) on their desktop with an optimized memory footprint, higher simulation speed and faster compile time. Using this new technology, a 130M gate design with 32 instantiations was compiled in less than 12 minutes on a single workstation, simulated at a rate of 10 cycles per second and used 32Mbytes of memory. This capability provides up to 15X run-time speed-up and 30X-memory efficiency in addition to 32X-compile time improvement.

The Quickturn SpeedSim cycle-based simulator will replace the existing Cadence Cobra cycle simulator. The cycle techniques utilized in the Cobra cycle simulation technology are being added to the Affirma(tm) NC hardware description language (HDL) simulators and will no longer be sold as a separate product. The SpeedSim product is ideally suited to applications that require fast compiling of large amounts of data, multiprocessor support, and simultaneous test capability. The Cobra cycle capability combined with the Affirma NC simulators provides true, high-performance cycle-optimized event simulation.

Price and Availability

PowerSuite will be available in the third quarter of 1999. PowerSuite is priced at $125,000 (U.S.). This includes one license of SpeedSim, common compiler and run-time debug licenses for CoBALT and SpeedSim, one license of SignalScan waveform display tool, one copy of StyleCheck, QEL/TCK scripting language, and API/PLI standard interfaces. The MegaSim option to SpeedSim starts at $10,000 for 4-way and goes up to $60,000 for 32-way MegaSim. Additional SpeedSim debug licenses are $25,000 each. The PowerBench (co-verification testbench) toolkit includes: one GNU debugger, an interface that synchronizes between the hardware design and the C program software, a single synthesizable CPU Lite processor, and is priced at $25,000. HDL-ICE for VHDL design is priced at $45,000.

About Quickturn

Quickturn, a Cadence company, is the leading provider of verification products and time-to-market engineering (TtME(tm)) services for the design of complex ICs and electronic systems. The company's products are used worldwide by developers of high-performance computing, multimedia, graphics and communications systems. Quickturn is headquartered at 55 W. Trimble Road, San Jose, CA 95131-1013. Telephone: [phone]. For more information, visit the Quickturn website at www.quickturn.com or send e-mail to [e-mail].

Note to Editors: The product name "CoBALT Plus" is written with "Plus" superscript.