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QuickLogic Introduces PolarPro FPGA Architecture to Tackle Power Sensitive Applications.


SUNNYVALE, Calif. -- QuickLogic Corporation (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:QUIK):

--Innovative Architecture Tailored to Address the Needs of Power Sensitive Applications, Lowering FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  Power Consumption to Less Than 10 uA.

--Enables Intelligent Bridging between Processors and Peripheral Sub-Systems.

--Expanded Feature Set Enables Wireless Connectivity and Efficient Non-Volatile Storage (storage) non-volatile storage - (NVS, persistent storage, memory) A term describing a storage device whose contents are preserved when its power is off. Storage using magnetic media (e.g.  While Lowering Overall System Costs.

QuickLogic Corporation (NASDAQ:QUIK), the low power programmable logic See PLD.  leader, today announced PolarPro(TM), its latest FPGA architecture that will break new ground for FPGA adoption into portable electronic applications. Cost effective, ultra-low power and employing small form factor packaging technology, this architecture is poised to set a new standard for enabling innovation. PolarPro supports power-conserving strategies in portable applications, while maintaining the functionality and time-to-market advantages of traditional FPGAs.

The PolarPro architecture addresses both the need to reduce power consumption and decrease system design costs through its unique embedded circuitry. PolarPro combines FPGA logic with embedded circuitry for implementing high-bandwidth bus-to-bus interfaces, including large arrays of on-chip dual-port RAM with co-located asynchronous Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. The ability to initiate a transmission at either end.  First-In, First-Out first-in, first-out
n.
A method of inventory accounting in which the oldest remaining items are assumed to have been the first sold. In a period of rising prices, this method yields a higher ending inventory, a lower cost of goods sold, a higher gross
 (FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods.

FIFO - first-in first-out
) controllers, DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM.

DDR - Double Data Rate Random Access Memory
 interfaces for highly cost effective memory expansion, and clock management units. All device circuitry is optimized for low power usage through the new Very Low Power mode (VLP VLP Virus-like particles, see there ).

PolarPro Significantly Minimizes System Power

The new PolarPro FPGAs incorporate an 'instant' deep-sleep VLP standby mode A sleep mode in a portable computer that provides an almost immediate resumption of operation when turned back on. In standby mode, the hard disk and display are turned off, and the CPU is throttled down to its lowest-power state.  that reduces power consumption to less than 10 uA. This is less than 1/1,000 that of flash-based FPGAs and less than 1/10,000 SRAM-based FPGAs respectively. This power conservation level is assured in all device situations due to the dedicated circuitry that isolates the I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 pads from the logic core when in standby mode.

With the VLP mode and instant-on operation, a host processor can put the PolarPro device into and out of sleep mode in just microseconds, letting the logic hardware be efficiently controlled with a system-level interrupt scheme and saving battery power when device functionality is not needed. This approach eliminates the common problem of device power consumption well above an FPGA's static power consumption figure when it is connected to an active bus -- a common situation for processor-to-peripheral bridging implementation. In these types of applications, which are commonplace in products like Portable Media Players (PMPs), PDAs and cell phones, an FPGA's static power consumption of 100 uA might become tens of milliamps in reality.

"Our low power ViaLink(R) FPGA technology has allowed us to address wireless and storage connectivity challenges in portable electronics applications," said Tom Hart, QuickLogic Chairman, President and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. . "Through our work with companies such as Intel(R), Atheros(R) and Seagate(R), we have gained vital knowledge about the stringent energy resources available in today's portable products as well as their sensitivity to cost. We have incorporated that knowledge into the new PolarPro architecture, utilizing the time-to-market advantages of FPGAs, increasing battery life and lowering the total system."

PolarPro Lowers Overall System Cost

From a Consumer Electronics (CE) perspective, total product cost typically relates to the Bill of Materials The list of components that make up a system. For example, a bill of materials for a house would include the cement block, lumber, shingles, doors, windows, plumbing, electric, heating and so on.  (BOM) of a system. The aim of QuickLogic's PolarPro architecture has been to reduce BOM cost by using the latest and lowest cost memory devices, such as mobile DDR2 memory, that leverage the high-volume markets of laptops and PCs. In addition, with QuickLogic's ViaLink technology there is no in-rush current during power-up, such as that seen with SRAM-based FPGAs, further reducing the cost of advanced power management circuitry.

When programmable logic is used in systems with a processor, wired or wireless connectivity, and potentially non-volatile storage such as miniature hard disks, memory sticks, and other storage devices, the logic often must bridge different system clock-frequency domains. The PolarPro architecture addresses overhead costs overhead costs

see fixed costs.
 with built-in FIFO controllers and other specialized circuitry. This provides a seamless, cost-effective way to bridge several clock domains together, allowing the designer to focus on other important energy conserving strategies.

By integrating FIFO controllers into the PolarPro architecture, QuickLogic reduces the effective silicon area required to implement such functions by 97%, delivering guaranteed asynchronous FIFOs for mere pennies. Additionally, to assist the designer with the bridging clock domains, PolarPro features advanced, low power Configurable Clock Managers (CCMs) that compensate for any "device internal" or "circuit-board external" interconnect delays.

Finally, the PolarPro multiplexer-based cell supports both the industry standard 4-input Look Up Table (LUT (LookUp Table) An array or matrix of values that contains data that is searched. See index and color palette. 4) function, as well as a wider combination of functions with up to 13 inputs. This hybrid, variable grain logic cell leverages the significant investments in logic synthesis The conversion of a high-level electronic circuit description into a list of logic gates and their interconnections, called the "netlist." Every logic synthesis program understands some subset of Verilog and VHDL.  for LUT4 FPGA architectures in addition to the traditional wide fan-in PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user.  architectures. All these PolarPro innovations yield an FPGA platform that addresses the cost and stringent power consumption budgets of current and future portable electronic devices.

PolarPro Deliverables

Version 9.8 of QuickWorks(R) will be available for download from the QuickLogic website in early December. It will include timing, area and power-optimized designs for the PolarPro family suite of FPGA development tools. The VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  and Verilog design entry is supported by industry-leading logic synthesis tools.

Availability and Pricing

The 640 logic cell device, the QL1P100, will be sampling in December, with the other members of the family expected to sample during 2006. In high volumes, the QL1P100 will be priced as low as $2.95.

Safe Harbor Safe Harbor

1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated.

2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive.
 Statement

This news release contains forward-looking statements relating to, among others, the expected benefits of our new PolarPro FPGA architecture and our expectations regarding availability dates and pricing. QuickLogic's actual results may differ materially from the results described in the forward-looking statements. Factors that could cause actual results to differ include, but are not limited to, a delay in the availability of the PolarPro product family, the performance and market acceptance of the PolarPro technology and the impact of competitive products, general conditions in the semiconductor industry and related development risks. Certain other risk factors are detailed in QuickLogic's periodic reports and registration statements filed with the Securities and Exchange Commission. These forward-looking statements speak only as of the date hereof. QuickLogic disclaims any obligation to update these forward-looking statements.

About QuickLogic

QuickLogic Corporation (NASDAQ:QUIK) is the leading provider of the lowest power programmable logic solutions for the portable electronics, industrial, communications and military markets. Our latest products, PolarPro(TM), Eclipse II(TM) and QuickPCI(TM) are being used to implement bridge and control solutions in embedded systems requiring Wi-Fi and IDE-based hard disk drives. QuickLogic's proprietary ViaLink(R) technology offers significant benefits, for programmable logic, including the lowest power, instant-on capability and bullet proof intellectual property security. The company is located at 1277 Orleans Drive, Sunnyvale, CA 94089-1138. Web site www.quicklogic.com

The QuickLogic name and logo are registered trademarks of QuickLogic Corporation. All other brands or trademarks are the property of their respective holders and should be treated as such.
COPYRIGHT 2005 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2005, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Nov 7, 2005
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