Qualis Releases Ethernet Verification Component for Hardware Verification Language OpenVera.

Business Editors/High-Tech Writers

LAKE OSWEGO, Ore.--(BUSINESS WIRE)--Feb. 25, 2002

Powerful Verification Model Significantly Reduces

Time-to-First-Test by Merging Protocol-Specific

Knowledge with Advanced Verification Methods

Qualis(R) Design Corporation, the independent leader in advanced verification methodologies, announces the availability of a powerful new Ethernet Verification Component for Synopsys' OpenVera(TM) that dramatically reduces the verification time of complex Ethernet-based networking products.

Based on Qualis' advanced plug-and-play Domain Verification Component(TM) (DVC(TM)) architecture, the new component allows verification engineers to quickly build Ethernet verification environments that leverage the power of OpenVera and advanced verification methodologies.

"By welding together our deep experience in verifying complex networking products with advanced, random-based verification methodologies, we've invented a powerful new way to verify protocol-centric designs," said Michael Horne, president and CEO of Qualis. "Verification engineers can now write advanced testcases for their Ethernet designs within hours of installing our DVC, saving months of effort they would otherwise spend creating and debugging the test environment. The verification productivity improvement is massive."

The Ethernet DVC is a complete test environment supporting the IEEE 802.3-2000 specification for 10 and 100 megabit Ethernet, offering highly-programmable and extendable stimulus generation, automated response checking, and test coverage measurement. The DVC provides an easy interface for generating test packets for the MII, RMII, and SMII interfaces, detecting collision conditions, catching protocol violations, and checking for compliancy to the industry standard.

"We are pleased to see Qualis supporting OpenVera and delivering an OpenVera Ethernet DVC as a charter member in the OpenVera Catalyst Program," said Farhad Hayat, vice president of marketing for the Verification Technology Group at Synopsys, Inc. "The goal of the OpenVera Catalyst Program is to accelerate the availability and proliferation of OpenVera verification intellectual property (IP) to enhance verification productivity for our mutual customers."

Highly Productive Simulation Technology

The Ethernet DVC is much more than a simple Ethernet simulation model. The new technology embeds protocol knowledge and advanced verification techniques in an easy-to-use reusable block. The Ethernet DVC dramatically raises the level of productivity of verification engineers by providing a pre-verified Ethernet stimulus generation and automated response checking component that leverages the power of Synopsys' VERA(R) test environment. Verification engineers can quickly assemble a verification environment for complex Ethernet designs and immediately focus on their primary goal: writing testbenches that verify their design.

"After years of experience helping our networking customers verify their leading-edge designs, we have developed a highly-reusable verification component technology that truly delivers a 10x to 25x improvement in verification productivity," said Janick Bergeron, chief technology officer at Qualis. "With the help of our DVCs and our patent-pending interconnect technology, verification engineers can now jump immediately to writing testcases for their design. And with Qualis' expanding library of DVCs, engineers will be able to quickly build multi-protocol environments for complex applications like routers, framers, and network processors."

The new Ethernet Domain Verification Component offers a rich set of features, including:

-- IEEE 802.3-2000 compliant, comprehensive test environment. Configurable for
verifying a system of any number of MII, RMII, and SMII interfaces

-- Leverages the full power of the VERA testbench tool. Full support of
SoC/ASIC, FPGA, system, and board-level verification

-- Full support of automatic random, constrained random, and directed testcase
creation

-- Built-in flexible checking mechanism, with on-the-fly protocol
checkers/monitors and coverage support

-- Extendable architecture allows user to create standalone test environment or
embed the DVC in a larger existing test environment

-- Support for creation of higher-layer packets (e.g. TCP, IP). Extensible for
interconnect to future protocol DVCs from Qualis

-- Half-duplex and full-duplex support for 10Mbit and 100M ports, collision
detection and creation capability

-- Full coverage statistics collection for test stimulus as well as Rx and Tx
port

-- Built-in error handling of CRC, short/long packets, corrupt preamble,
corrupt SSE, etc. Support of VLAN tagging, tagged frame creation and checking
(802.1Q). Full support of 802.3x PAUSE operation, control and checking. Full
802.2 support for LLC.

For a complete listing of features of the OpenVera Ethernet DVC, visit our website at http://www.qualis.com/dvc.ethernet.vera.pdf.

Pricing and Availability

The Ethernet DVC is available today for OpenVera and supports interfacing to Verilog and VHDL designs. Annual licenses are priced at $US 7,500, with volume discounts available for customers who run large regression simulations. The OpenVera Ethernet DVC comes with full documentation and example configurations for typical Ethernet verification environments. Qualis also offers full methodology training and support services for its DVCs, including its QuickRamp(TM) family of DVC deployment solutions. For more information, visit http://www.qualis.com/dvc.html.

About Qualis Design

Qualis Design is the leading independent verification methodology company offering a rich selection of productivity enhancing Domain Verification Components(TM), methodology consulting, and best-in-class training services. By leveraging its deep experience in verifying networking, processor/SoC, and wireless products, Qualis creates verification product solutions that solve the most challenging functional verification problems in the world. Users of Qualis' revolutionary technology and verification methodology know-how build sustainable competitive advantages that keep them on the edge. Qualis is headquartered in Lake Oswego, Oregon and has development centers in Ottawa Ontario Canada, and Grenoble, France. To learn more, visit http://www.qualis.com/.

Note to Editors: Qualis and the Qualis logo are registered trademarks of Qualis Design Corp. DVC, Domain Verification Component, and QuickRamp are trademarks of Qualis Design Corporation. Synopsys and VERA are registered trademarks of Synopsys, Inc. OpenVera is a trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.