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Qimonda and Rambus Sign Technology License for XDR(TM) DRAM.


Companies to Jointly Market High Performance Memory Solutions for Computing and Entertainment Applications

LOS ALTOS, Calif. -- Rambus Inc. (Nasdaq:RMBS RMBS Residential Mortgage-Backed Securities
RMBS Rambus, Inc. (NASDAQ stock symbol)
RMBS Russian Mortgage-Backed Securities
), one of the world's premier technology licensing companies specializing in high-speed chip interfaces, today announced that Qimonda AG, a leading global producer of DRAM memory products, recently signed a technology license agreement for the Rambus XDR (1) (EXternal Data Representation) A data format developed by Sun that is part of its networking standards. It deals with integer size, byte ordering, data representation, etc. and is used as an interchange format. [TM] memory interface solution. The Rambus XDR solution will be implemented in Qimonda's 75nm process technology for integration into high-volume applications, including game consoles, digital televisions, set-top boxes and PC graphics.

"Since signing a patent license agreement with Qimonda, we have worked towards a relationship where our engineering teams could collaborate on leadership memory solutions to serve the global market," said Sharon Holt, senior vice president of Worldwide Sales, Licensing and Marketing at Rambus. "We are very proud to be working with Qimonda to deliver this advanced memory product for a growing number of applications in computing and digital entertainment."

"The XDR memory solution completes our broad graphics RAM portfolio to better serve high-performance and high-bandwidth applications for the fast growing global computing and consumer electronics markets," said Robert Feurle, vice president and general manager of Graphics DRAM at Qimonda.

Rambus XDR DRAM, as part of the XDR memory architecture, achieves an order of magnitude A change in quantity or volume as measured by the decimal point. For example, from tens to hundreds is one order of magnitude. Tens to thousands is two orders of magnitude; tens to millions is three orders of magnitude, etc.  higher performance than today's standard memories. Perfect for graphics processing, consumer electronics, network, and server applications, a single, 2-byte wide, 3.2 GHz XDR DRAM component provides 6.4 GB/sec of peak bandwidth, and enables PCB PCB: see polychlorinated biphenyl.
PCB
 in full polychlorinated biphenyl

Any of a class of highly stable organic compounds prepared by the reaction of chlorine with biphenyl, a two-ring compound.
 savings and cost savings by utilizing the fewest number of ICs.

The advanced XDR memory architecture features key enabling technologies built on patented Rambus innovations, including:

* Differential Rambus Signaling Level (DRSL DRSL Differential Rambus Signaling Levels (bi-directional differential signaling technology) ), a low-voltage, low-power, differential signaling standard that enables scalable multi-GHz, bi-directional, and point-to-point data busses that connect an XDR memory controller (XIO XIO St Marys, Ontario, Canada - St Marys / via Rail Service (Airport Code)
XIO Execute Input/Output
XIO Xdr Input Output
XIO All in One
XIO Extended Input Output
XIO Any Input Output
) to XDR DRAM devices;

* Octal Data Rate (ODR ODR Online Dispute Resolution
ODR On-Demand Routing
ODR One-Definition Rule (C++)
ODR Octal Data Rate (high speed memory interface transfers 8 bits of data per clock cycle)
ODR Office of Dispute Resolution
), a technology that transfers eight bits of data on each clock cycle, four times as many as today's state-of-the-art memory technologies that use DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM.

DDR - Double Data Rate Random Access Memory
 (Double Data Rate) clocking;

* FlexPhase[TM], a circuit technology that enables flexible phase relationships between signals, allowing precise on-chip alignment of data with clock; and

* Dynamic-Point-to-Point (DPP DPP - Dining Philosophers Problem ), an innovation that maintains the signal integrity benefits of point-to-point signaling on the data bus, while providing the flexibility of capacity expansions with module upgrades. DPP was recognized with a "2005 Innovation of the Year" award by industry publication EDN Magazine.

For more information about the Rambus XDR memory architecture consisting of the XDR DRAM device, the XCG XCG Xdr Clock Generator  (XDR Clock Generator), the XIO controller interface cell, and the XDR memory controller (XMC), as well as the next generation of XDR DRAM (XDR2), starting at 8GHz with micro-threading, please visit www.rambus.com/xdr.

About Rambus Inc.

Rambus is one of the world's premier technology licensing companies specializing in the invention and design of high-speed chip interfaces. Since its founding in 1990, the company's patented innovations, breakthrough technologies and renowned integration expertise have helped industry-leading chip and system companies bring superior products to market. Rambus' technology and products solve customers' most complex chip and system-level interface challenges enabling unprecedented performance in computing, communications and consumer electronics applications. Rambus licenses both its world-class patent portfolio as well as its family of leadership and industry-standard interface products. Headquartered in Los Altos, California Los Altos (IPA: [lɔs ɑltos]) is a city at the southern end of the San Francisco Peninsula, in the San Francisco Bay Area. The city is in Santa Clara County, California, United States. , Rambus has regional offices in North Carolina, India, Germany, Japan, Korea and Taiwan. Additional information is available at www.rambus.com.
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Publication:Business Wire
Date:Jan 3, 2007
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