QED Announces PowerPC Microprocessor Technology Development in Addition to Existing MIPS Microprocessors; 603q Technology Extends QED's Capabilities to Service Embedded Markets.

SAN JOSE, Calif.--(BUSINESS WIRE)--Oct. 21, 1996--Following its debut as a full-service microprocessor company focusing on the high-end embedded market, Quantum Effect Design, Inc. (QED) will announce the details of its first PowerPC(TM) technology development -- the 603q(TM).

The 603q was designed under the company's former "design-for-hire" business model and represents a technology development achievement for QED. The 603q ran Netscape Navigator(TM) under MAC O/S with metal revisions only to first silicon. The company recently announced its expanded fabless business model at the Embedded Systems Conference held here last month (see release dated Sept. 16).

The 603q is QED's first PowerPC RISC microprocessor design targeted to meet the stringent price/performance requirements of embedded markets. It represents QED's ability to quickly adapt its design technology to another microprocessor architecture and continues the "simple is better" micro-architectural approach as demonstrated by the company's previous generations of popular MIPS-based microprocessor designs -- the R4600(TM), R4700(TM), R4650(TM), R4640(TM) and R5000(TM).

"We approached the 603q design contract from a design capability perspective -- we felt that QED could achieve similar price/performance results on a PowerPC microprocessor given our successes with MIPS microprocessors. We have achieved just that -- compared to the current generation of PowerPC microprocessors, the 603q delivers significantly improved price/performance," said Tom Riordan, QED president and CEO. "With the addition of the 603q technology, QED is now in position to add derivatives of this technology into our current portfolio of popular high-performance, cost-effective MIPS embedded microprocessors."

603q Technology Description

The primary design goal of the 603q was to utilize QED's extensive microprocessor design experience to develop a high-performance, low system cost, low power consumption PowerPC implementation. The 603q is a high-performance, cost-effective 32-bit PowerPC compliant microprocessor with 120 SPECint92 and 84 SPECfp92 ratings at 160 MHz and has a die size of 69 mm(squared) using a 0.5(micro)M single poly, triple level metal CMOS process. The 603q can be packaged in a low-cost 160 pin QFP.

The 603q implements the PowerPC instruction set architecture with a single-issue 5-stage integer unit pipeline with in-order execution. The integer unit includes multiply and divide instructions and unaligned, multiple and string load and store instructions. It also has a double-precision floating point unit with both single and double precision multiply/add (madd) function.

The 603q includes a 16K 4-way set associative instruction cache and an 8K 2-way set associative data cache. The memory management unit has a shared address translation unit with a unified, 4-way 64 entry translation lookaside buffer (TLB) and 603e compatible software refill. The 603q uses a multiplexed address and databus similar to the 602 including the 603e/602 MEI bus protocol.

QED uses micro-architectural refinements, fully static CMOS logic, gated clock techniques and a low-power RAM cell design to produce a measured power consumption of 1.2W @ 3.3V at 120 MHz.

603q Aimed at High-Performance 32-bit Embedded Market

QED chose to use a simple single-issue CPU microarchitecture in the 603q versus the more complicated multi-issue approach used in other popular 603 microprocessors, in order to produce a minimal die size. As an apparent added benefit of this design approach, early indications are that the 603q achieves similar computational performance as the 603e in equivalent process technologies. That is, the higher clock rate of the 603q balances the lack of multi-instruction issue.

The 603q die size is about one-third smaller than the 603e and power consumption at equivalent performance is about one-half of the 603e. The 603q cost advantage is further enhanced by the fact that the 603q uses a triple-level-metal (TLM) process whereas the 603e uses a quad-level-metal process.

In comparison to the PowerPC 602(TM) microprocessor, the 603q provides double the clock frequency performance, double-precision floating point, three times the on-chip cache and a lower cost TLM manufacturing process with only a 30% larger die size. Both the 603q and 602(TM) use a multiplexed address/data bus implementation to provide low system cost as well as the lowest cost way of avoiding a pad-limited die.

As demonstrated in both QED's MIPS and PowerPC designs, the simplest design point will drive the highest price/performance and power/performance ratios, although not necessarily the highest absolute performance. This simple design point will produce the high-performance, maximally cost-effective microprocessors required by the embedded market.

By contrast, in order to be competitive in the desktop market, microprocessor designers are required to place an absolute premium on performance with little if any regard for cost and power consumption. These processors will show themselves to be inappropriate for embedded applications. There is a clear opportunity for a processor targeted directly at the highest performance end of the embedded market. For example, QED's RM7000(TM) (see 10/21 press release) targets these markets directly.

About the Company

Quantum Effect Design, Inc., founded in 1981, designs, develops and markets high-performance, cost-effective, market-driven embedded microprocessor solutions. The company designed and developed many of the 64-bit MIPS microprocessors including the popular R4600(TM), R4700(TM), R4650(TM), R4640(TM) and R5000(TM) and under its own "RISCMark" label, the RM7000(TM).

Quantum Effect Design's future product families will include high-end, 32- and 64-bit embedded microprocessors targeted at emerging and fast-growing markets such as internetworking, printers, games, Internet TV/set-top boxes/cable modems and high-speed communications devices. The company has an unsurpassed record of designing and delivering innovative high-performance microprocessors in breakthrough time-to-volume.

Company headquarters are located in Santa Clara. Telephone: [phone]. World Wide Web site: http://www.qedinc.com. -0-

Note to Editors: Navigator is a trademark of Netscape Corp.; PowerPC is a trademark of IBM Corp. and Motorola; MIPS is a registered trademark of MIPS Technologies, Inc.; R4600, R4700, R4650, and R4640 are trademarks of Integrated Device Technology, Inc.; R5000 is a trademark of MIPS Technologies, Inc; and RISCMark and RM7000 are trademarks of Quantum Effect Design, Inc.

CONTACT: Quantum Effect Design

Rick Kepple, 408/565-0315

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Simon/McGarry Public Relations 

Sandra McBride/Melanie Laurence, 408/746-0911

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