Professional Development Certificate Program.Twelve courses are available in this year's Professional Development Certificate Program--two 2-day Design Excellence Curriculum courses and nine 1-day Tutorials. These technical courses are taught by industry experts who will provide you with the technology, theory, application and best-practice information that you need to achieve professional growth and development. You'll receive a certificate of completion for each Professional Development course that you attend and complete. Note: Professional Development courses are not included on the Technical Conference Proceedings CD-ROM CD-ROM: see compact disc. CD-ROM in full compact disc read-only memory Type of computer storage medium that is read optically (e.g., by a laser). . TWO-DAY DEC COURSES SUN MAR 26 and MON MAR 27. 9 AM-5 PM DEC 1--High-Speed Design--Signal Integrity, EMI (ElectroMagnetic Interference) An electrical disturbance in a system due to natural phenomena, low-frequency waves from electromechanical devices or high-frequency waves (RFI) from chips and other electronic devices. Allowable limits are governed by the FCC. and Crosstalk (1) Electromagnetic interference that comes from an adjacent wire. "Alien" crosstalk is interference that comes from a wire in an adjacent cable, for example, when two or more twisted wire pair cables are bundled together. Speaker: Rick Hartley, L-3 Communication, Avionics Systems Attendees: PCB PCB: see polychlorinated biphenyl. PCB in full polychlorinated biphenyl Any of a class of highly stable organic compounds prepared by the reaction of chlorine with biphenyl, a two-ring compound. designers, engineers and managers interested in learning and applying high-speed concept to electronic products. Updated for PCB West! This two-day course is a compete introduction to the high-speed design concepts needed to ensure success with designs utilizing the fast and ultra-fast ICs of today and tomorrow. In today's printed circuit boards, it's not so much the rate at which the circuit is clocked, but the output edge rate (rise/fall time) of ICs that causes signal integrity problems, EMI and crosstalk. The course will cover circuit parasitics, high-frequency currents, signal and wave propagation Wave propagation is any of the ways in which waves travel through a medium (waveguide). With respect to the direction of the oscillation relative to the propagation direction, we can distinguish between longitudinal wave and transverse waves. , propagation time and velocity, control of signal crosstalk, power distribution and decoupling Decoupling The occurrence of returns on asset classes diverging from their normal pattern of correlation. Notes: Take for example stock and corporate bond returns, which normally rise and fall together. , types of EMI, source control of EMI, control of EMI coupling, split planes and plane islands, PCB layer stackups, filters and filtering techniques, system RF shielding A material that prohibits electromagnetic radiation from penetrating it. Computers and electronic devices used in the home must meet U.S. government standards for electromagnetic interference. and grounding, metal vs. plastic enclosures, slots in enclosures, and conducted EMI filters. Attendees will learn about interfacing with the fabricator fab·ri·cate tr.v. fab·ri·cat·ed, fab·ri·cat·ing, fab·ri·cates 1. To make; create. 2. To construct by combining or assembling diverse, typically standardized parts: , PCB fabrication fabrication (fab´rikā´sh  n),n the construction or making of a restoration. methods and concerns, PCB fabrication drawings, impedance testing, test coupons and cost differential of controlled impedance PCBs. DEC 2--HDI/Microvias and Embedded Passives Design Challenges Speakers: Happy Holden, Asian Pacific Materials; and Mike Fitts, Mentor Graphics Mentor Graphics, Inc (NASDAQ: MENT) is a US-based multinational corporation dealing in electronic design automation (EDA) for electrical engineering and electronics, as of 2004, ranked third in the EDA industry it helped create. Corp, Attendees. PCB design engineers, designers, managers and others interested m utilizing HDI HDI Human Development Index (UNDP yardstick of human welfare) HDI Help Desk Institute HDI Humpty Dumpty Institute (New York, New York) HDI High Density Interconnect , embedded passives and other advanced technologies. Updated and enhanced for PCB West! This year, both Holden's lecture and Fitts hands-un exercises using working CAD tools will take place on both days, instead of holding lecture sessions on Monday and hands-on exercises on Tuesday as in past years. This two-day course will examine design techniques for the interconnection of area array components--from ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. packaging and portable products to high performance computing, telecom and dense multi chip modules. PCB design rules, materials and selection of PCB structures (blind, buried, and microvias) will be examined and compared. This course also will explain the costing and electrical performance of embedded passives technology. The hands-on exercises will begin with a discussion of CAD toolsets and will continue with attendees using actual toolsets to strengthen their understanding of how HDI and buried passives can help solve everyday design challenges. Previous CAD tool experience is required. Participants are encouraged to bring along their technical questions for discussion and be prepared to work in teams on a competitive basis. Day 1: Introduction to Advanced PCBs and HDI/Microvias, by Holden and Fitts. Discussion will feature design challenges, breakout and routing of fine-pitch and high I/O devices, BGA/LGA layout, design rules and stackup stack·up n. A deployment of aircraft circling an airport at designated altitudes while awaiting instructions to land. , microvia structures, simplifying multilayers, designing blind and buried vias, and design aspects of electrical performance and signal integrity of HDI structures. Hands-un exercises will focus on HDI/microvias. Day 2: Designing with HDI/Microvias and Buried Passives, by Holden and Fitts. Discussions will cover very tiny SMT (1) (Surface Mount Technology) See surface mount. (2) (Station ManagemenT) An FDDI network management protocol that provides direct management. Only one node requires the software. SMT - Station Management and embedded passives, materials for distributed capacitance, resistors and capacitors (including buried resistor resistor, two-terminal electric circuit component that offers opposition to an electric current. Resistors are normally designed and operated so that, with varying levels of current, variations of their resistance values are negligible (see resistance). and capacitor technologies), alternative SMT technologies, design rules, and embedded passives costing/performance tradeoffs. Hands-on exercises with EP include selecting BOM components for embedding, utilizing a cost tradeoff worksheet, and designing EP resistors and capacitors. ONE-DAY TUTORIALS SUN MAR 20 * 9 AM-5 PM NEW! T1--PCB Design For Real-World EMI Control: EMC (1) (EMC Corporation, Hopkinton, MA, www.emc.com) The leading supplier of storage products for midrange computers and mainframes. Founded in 1979 by Richard J. Egan and Roger Marino, EMC has developed advanced storage and retrieval technologies for the world's largest companies. is NOT Magic! Speaker: Dr. Bruce Archambeault, IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) Attendees: PCB designers, design and layout engineers, and EMI/EMC EMI/EMC Electromagnetic Interference/Electromagnetic Compatibility engineers interested m better understanding the causes of EMC at the PCB level, and how to control these signals. Managers interested in making better trade-off decisions and providing proper emphasis to EMC design issues are welcome. Proper EMC design for PCBs can make a significant difference in the final product's performance in the EMC lab. Unfortunately, EMC design is considered to be magic. This tutorial focuses on the basic causes of EMC problems, and how to overcome these problems. Attendees will not merely learn a list of rules of thumb; instead, this tutorial will help attendees understand why EMC problems happen, and what can be done to eliminate them. The course's primary focus is to help working engineers understand the causes of EMC problems so this knowledge can be applied to real-world product design immediately. Formulas and equations are m)t required and are minimized throughout the seminar. Understanding the causes of EMC problems will allow engineers to make difficult design trade-off decisions! Topics to be studied include: antennas, the grounding myth, partial and incomplete inductance inductance, quantity that measures the electromagnetic induction of an electric circuit component; it is a property of the component itself rather than of the circuit as a whole. , intentional and unintentional signals, critical signals, common-mode and differential-mode emissions, crosstalk coupling, multilevel/cascade crosstalk, guard traces vs. physical separation, direct radiation from traces, board edge effects, stitching capacitors, board resonance, excitation modes, splits in ground-reference plane in I/O area A reserved segment of memory used to accept data from an input device or to accumulate data for transfer to an output device. See buffer. , effects of optimum net termination on EMC, critical net return current flow, grounding heatsinks to motherboard, internal radiation from wires and cables, filter design, shielding, and the use of commercial SI tools to help reduce EMC Attendees will receive copies of all transparencies used in the presentations. Catch the author of the popular "EMI/EMC Computational Modeling Handbook" at PCB West! NEW! T2--Advanced IC Packaging Technologies Speaker: Joe Fjelstad, SiliconPipe Attendees: PCB designers, product engineers, development engineers, manufacturing engineers and others needing a better understanding of advanced IC packaging technologies. The line between the IC package and the printed circuit was once very sharp and well defined. However, over the last few years that line has blurred as product developers attempt to put more function into ever-decreasing sizes. Packaging technology has now attained virtual parity in importance with the IC chip itself. This course will guide the participants though the world of IC packages and will include a review of some of the most recent innovations. Attendees will better understand not only what packaging choices and options are available, but also how they are built, their strengths and their weaknesses. Tutorial topics will include: IC packaging origins and options, assembly processes, flip chip A chip packaging technique in which the active area of the chip is "flipped over" facing downward. Instead of facing up and bonded to the package leads with wires from the outside edges of the chip, any surface area of the flip chip can be used for interconnection, which is typically done and wire bonding Wire bonding is a method of making interconnections between a microchip and other electronics as part of semiconductor device fabrication. The wire is generally made up of one of the following:
NEW! T3--PCB Design 101 Speakers: Gary Ferrari, Ferrari Technical Services; and Susy Webb, Suntron Corp. Attendees: Entry-level PCB designers and anyone else interested in an introduction to PCB design. Managers often ask, "Where can I send my entry-level designers to learn the tricks of the trade?" This tutorial is the answer! Technical sessions at conferences often emphasize the latest techniques and technologies, but unfortunately those classes are usually too in-depth for the typical novice designer. This class is targeted at the entry-level PCB designer or someone just starting out in this profession. Attendees will begin with the components and the schematic, and continue through layout and post-processing. Attendees will learn how to interpret component specification sheets and schematics, how to plan component placement, as well as routing strategies, DFM DFM Design for Manufacturing (newsletter) DFM Design for Manufacturability DFM Dubai Financial Market DFM Delphi Form (computer filename extension) DFM Distinguished Flying Medal DFM Diesel Fuel Marine , DFT DFT - discrete Fourier transform , post-processing and more. NEW! T4--The ABCs of Grounding. Including Analog/Digital Planes Speaker: Robert Hanson Robert Hanson or ... Hansen or ... Hanssen may be:
Attendees: PCB designers, design engineers and others with an understanding of basic design techniques. This tutorial will discuss the properties behind grounding. The concept that high-speed current follows the path of least inductance will be analyzed, as well as how this causes crosstalk in solid and slotted ground planes. This tutorial will address the following questions and more: Which should be used for your design--single ground, modified or multipoint ground A Multipoint Ground is an alternate type of electrical installation that attempts to solve the Ground Loop and Mains hum problem by creating many alternate paths for electrical energy to find its way back to ground. ? Do guard traces really stop crosstalk, and can they resonate res·o·nate v. res·o·nat·ed, res·o·nat·ing, res·o·nates v.intr. 1. To exhibit or produce resonance or resonant effects. 2. ? What causes near-end and far-end crosstalk and how is it measured and simulated? What's the best way to separate analog from ECL/PECL and TTL/CMOS? What are picket fences This article is about the television series. For the fence variety, see Picket fence. For the radio/telephony term, see Picket fencing. Picket Fences and the 20H rule, and what can they do to suppress emissions? How should shields be tied to ground to minimize radiation and circulation current? Why does the loss of the ground plane in cables cause crosstalk, radiation, reflections and propagation delay The time it takes to transmit a signal from one place to another. Propagation delay is dependent solely on distance and two thirds the speed of light. Signals going through a wire or fiber generally travel at two thirds the speed of light. Contrast with nodal processing delay. ? Is earthground an equal potential? Why are solid ground planes best? What is intelligent parts placement, and what is its effect on ground return current? Attendees will learn about the concept of moats/floats/draw bridges, how to layout split planes--CMOS/TTL PECL PECL PEAR (PHP Extension and Application Repository) Extended Code Language PECL Principles of European Contract Law PECL Positive Emitter Coupled Logic PECL Pseudo-Emitter Coupled Logic PECL Positive-Referenced Emitter Coupled Logic , and analog--using the same bias voltage See bias. . Discussion will focus on how to stack PCB layers (e.g., 4, 6 and 10 layers) for characteristic impedance This article is about impedance in electronics. For characteristic acoustic impedance, see acoustic impedance. The characteristic impedance or surge impedance of a uniform transmission line, usually written and crosstalk control. T5--Signal Integrity Issues in PCB Design Speaker: Doug Brooks, UltraCAD Attendees: PCB designers and design managers. Designers now recognize that faster component rise times mean that the circuit board itself has become an active circuit component. However, many do not appreciate how significant certain layout decisions can be in the ultimate performance and EMI certification of designs. This tutorial will look at layout practices that can lead to noise and radiation, explain why those practices cause problems, and show how to control or eliminate noise and EMI. Emphasis will be placed on transmission lines, loop areas, bypass capacitors and crosstalk. Fundamental issues to be covered include: what is noise vs. EMI, what causes noise and EMI, why noise and EMI can be harmful, signal reflections and their control with transmission lines, crosstalk and its relationship to EMI, power system noise and the role of bypass caps. Attendees of this session should have a basic familiarity with PCB design. FRI MAR 31 * 9 AM-5 PM T6--Placement and Routing of Complex PCBs Speakers: Rick Hartley, L-3 Communications
L-3 Communications Holdings, Inc. (NYSE: LLL) is a company that supplies command, control, communications, intelligence, surveillance and reconnaissance (C3ISR) systems and , Avionics Systems; and Susy Webb, Suntron Corp. Attendees: PCB designers, design engineers and others wishing to gain an understanding of the concepts behind parts placement and routing of complex PCBs. Everything you ever wanted to know about placement and routing! The concepts behind parts placement and trace routing always seem to pique the interest of PCB designers. The reality is, there is seldom one perfect way to place parts on a PCB. And once parts are placed, there are hundreds of possibilities for routing the many transmission lines of the circuit. Determining which placement and routing schemes optimize the design is a matter of physics, fit and opinion. This tutorial will focus on both the science behind placement and routing and the opinions of the two instructors. Attendees will learn about placement for optimum routing, placement "rooms" (several views), and placement's effects on the schematic, EMI, board stack-up, fabrication, testability, repair and assembly. It will also cover a typical design flow, routing plans, routing for best signal integrity, what's most important when routing, signals of greatest concern, I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output structures, differential pairs, analog vs. digital, and much more. NEW! T--7 Get Flexible: A Flex Circuits Investigation Speaker: Joe Fjelstad, SilieonPipe Attendees: PCB designers, product engineers, development engineers, manufacturing engineers and others who seek to create products using flexible circuit technology. Flexible circuit technology is perhaps the most versatile of all electronic interconnection technologies. While similar to rigid PCBs, flexible circuits have unique qualities that set them apart from other interconnection structures and they thus require special knowledge to employ them successfully. Attendees will gain a solid foundation for understanding and applying this unique technology that bridges the worlds of mechanical and electrical interconnections. Topics covered in the course include materials, structures (single-sided, double-sided, multilayer and rigid-flex), processes, design practices, assembly and applications. NEW! T8--DFM For Lead-Free Manufacturing Speaker: Gary Ferrari, Ferrari Technical Services Attendees: PCB designers, layout technicians and anyone interested in learning DFM techniques/or the lead-tree manufacture of PCBs. Technological advancements continue to drive our industry. Lead-free assembly is the latest technological change to affect the PCB designer. Cost-effective design and manufacture in leaded and lead-free environments form the fundamental building blocks for this full-day session. The class will be broken into separate interactive discussion groups to look at material issues such as lead-free laminates, high performance, HDI and surface finishes for lead-free assembly. The groups will explore further the challenges that the Restrictions of Hazardous Substances lead-free directive pose for the fabrication and assembly processes. Lastly, the groups will look at new and innovative ways to test and verify a product's integrity in both leaded and lead-free products. There will be ample time allocated to look at individual challenges faced by the attendees. The attendee should come out of this session with a clear understanding of overall DFM issues and how they relate to the RoHS lead-free directive. Attendees with all levels of interest in the PCB design process are invited. T9--Electronics Principles and Signal Integrity Speaker: Doug Brooks, UltraCAD Attendees: PCB designers and anyone interested in learning more about signal integrity. Do inductors and capacitors confuse you? Are you unsure what lead inductance means and why we worry about bypass capacitors? Then this course is for you! We'll start with an overview of resistors, capacitors, inductors and diodes, and how and why they do what they do. Next we'll look at what happens to resistance and impedance when we combine these components together in various ways in our circuits. Then we'll look at how these principles apply to the primary signal integrity issues board designers face today--EMI, crosstalk, signal reflections and transmission lines, and power supply conditioning to prevent ground bounce In electronic engineering, ground bounce is a phenomenon associated with transistor switching where the gate voltage can appear to be less than the local ground potential, causing the unstable operation of a logic gate. . At the conclusion of the course attendees will understand the basic causes of these signal integrity problems, and many of their solutions will become apparent. NEW! T10--Everything You Need to Know About Bypassing, Including BGAs Speaker: Robert Hanson, Americom Seminars Attendees: PCB designers, design engineers, EMC specialists, system architects, IC package designers and others. In today's high-frequency designs, clock speeds of 1 GHz and edge rates less than 1 nsec are common. These high frequencies and their harmonics must be bypassed properly between power and ground to insure power delivery, switching fidelity and control of radiated ra·di·ate v. ra·di·at·ed, ra·di·at·ing, ra·di·ates v.intr. 1. To send out rays or waves. 2. To issue or emerge in rays or waves: Heat radiated from the stove. emissions. To ensure that the power delivery system meets its objectives, the intelligent placement, value, size and type of capacitors must be achieved. Also, at higher frequencies the die and interplane capacitance must be optimized. Proper via placement for return current pathway minimization, laying out digital/analog interfaces, pours (Cu fills) and splits must be carefully analyzed. This full-day tutorial will illustrate a layout process that achieves 0.l ohm ohm (ōm) [for G. S. Ohm], unit of electrical resistance, defined as the resistance in a circuit in which a potential difference of one volt creates a current of one ampere; hence, 1 ohm equals 1 volt/ampere. up to the knee frequency and provides methods to minimize serial/parallel resonance and achieve constant ESR ESR - Eric S. Raymond . |
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