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Processing high frequency materials, Part 2: PCB fabricators can increase yields and improve product reliably by understanding the distinct process requirements of high frequency materials.

The electrical benefits of high frequency materials are well understood. There are, however, a number of fabrication concerns related to the most commonly used high frequency materials. These materials include PTFE (Teflon), PTFE with ceramic fillers and non-FTFE thermoset resin systems with ceramic loading, as well as bonding materials used to make multilayers from these materials. In addition, a newer material, LCP (Liquid Crystalline Polymer), while not as commonly used, offers unique properties that enable evolving PCB applications and several hybrid circuit constructions. LCP also has some specific fabrication guidelines that are different

The high frequency circuit materials that have been used in the industry for the longest period of time are the PTFE materials. Most of these materials are not pure PTFE. They can have either some small amount of micro-fiber glass impregnated into the substrate or can be PTFE with woven glass reinforcement. In some cases, the PTFE is ceramic-filled. In general, and in comparison to the other types of high frequency materials, the nearly pure PTFE without woven glass can be the most challenging type of circuit material to use in PCB fabrication.

There are several reasons for this: PTFE has a high CTE; PTFE doesn't let other materials (such as plating) adhere to it easily; and the PTFE substrate is soft and can be easily distorted. From an electrical performance perspective, the PTFE substrates that are typically the best to use are the ceramic-filled PTFE substrates because they are much easier to process through PCB fabrication.

The main PTFE PCB fabrication issues are: laminating the PTFE materials with other bonding materials; processing without scrubbing or mechanically altering the substrate; drilling without any smear; through-hole hole-wall preparation to increase adhesion of the copper plating in the PTH; dimensional stability (scaling) issues; and practices to minimize handling damage of the soft substrate.

Most bonding materials used in the PCB industry can be used as a bonding layer for a multilayer PTFE circuit, with some precautions. The main point of interest would be not to alter the exposed substrate surface. After the copper etching process, the exposed PTFE substrate surface should not be mechanically altered in any way. The mirror image of the copper profile, from the copper that was etched away, will be the surface roughness of the exposed PTFE. This surface will need to remain unaltered in order to assist with mechanical bonding to the bonding material.

A scrubbing process will actually polish the soft PTFE surface and have an adverse effect on the bonding, so it is not necessary to perform a process on the exposed PTFE substrate to activate it in order to accept a bonding material. There is a benefit to performing a bake cycle for the ceramic-filled PTFE just prior to lamination. The bake cycle is intended to drive off any possibly absorbed processing chemistry and can be done at 121[degrees]C (250[degrees]F) for 1 hour to 2 hours. The recommended processing parameters for the particular bonding material should be followed.

The choice of bonding materials is a mixed decision between circuit fabrication issues and end use performance. If the bonding layer is a substrate layer that is not electrically important, then standard FR-4 bonding materials can be used. If the layer is electrically important, then a more high-performance bonding material should be used. There are several bonding materials to choose from. FIGURE 5 lists information which highlights the electrical characteristics, as well as some key fabrication issues for several high-performance bonding materials.

The mention of special preparation for PTH in Figure 5 is in regard to making the substrate active to where it will accept copper plating, as previously discussed. The mention of a standard preparation relates to a standard permanganate, or plasma cycle, typically used for FR-4 materials.

The reference of a re-melt temperature concerns the thermoplastic materials that can reflow or melt in later processes at elevated temperatures. The re-melt could cause the multilayer to delaminate. If a soldering operation would need to be performed on the multilayer, it should be lower than the re-melt temperature or the proper bonding materials selected to endure the soldering operation. The materials that have an "N/A" are thermoset and will not melt or reflow in subsequent processes.

There are no known processes that can desmear PTFE, so when drilling the material, it is of paramount concern to minimize heating and ensure there is no smearing of the substrate. General parameters for drilling PTFE substrates are shown in FIGURE 6.

The drill tool should be new and not a re-sharpened tool for the nearly pure PTFE. This will ensure that the cleanest possible cut in the material can be made without smearing. However, a re-sharpened tool can be used for ceramic-filled PTFE substrates. If the circuit board is a hybrid using PTFE and other non-PTFE materials, then the drilling conditions should always be adjusted to the best PTFE drilling conditions. The circuit should be drilled with the PTFE up (toward drill tool entry), if there is only one PTFE outer layer in the PCB stackup.

After the holes have been drilled, the PTFE material will need to be prepared for activation so the copper plating process can achieve a uniform, adherent copper plating in the through-hole. In the case of the nearly pure PTFE substrates, a specialized wet chemistry process is recommended prior to the copper plating process. This process will use sodium naphthalene (or some derivative), which will strip a fluorine atom from the drilled surface in order to make the PTFE substrate wettable and accepting of the copper plating.

For ceramic-filled PTFE substrates, the same wet process treatment can be applied, but there is a caution that a thorough bake must be done on the panels just prior to the copper plating. The ceramic-filled PTFE substrates can absorb some of the wet processing chemistry. If the PCBs are not baked prior to plating, moisture from the wet process can be sealed into the material behind the electroplated copper in the through-hole. In later processes that involve elevated temperatures, the entrapped chemistry will volatilize and cause delamination of the substrate. A safer process for the ceramic-filled PTFE substrates would be to use a special plasma cycle that can make the substrate wettable so that it will accept metallization. There are two plasma cycles that are commonly used. The parameters for the first plasma cycle are shown in FIGURE 7. The second plasma cycle is similar to the first, except for the type of gas that is used. In this case, the gas mix would be 100% Helium.

Ceramic filled materials have unique demands for the fabricator. Several important fabrication issues regarding ceramic loaded resin systems are: drill tool life is low; drill tools should not be re-sharpened or reused; rough drilled hole wall quality; loose ceramic particles after through-hole wall preparation; prepregs have minimal flow characteristics; and the prepregs are sensitive to low pressure areas during lamination.

Drilling the ceramic-filled resin systems is more like excavating than drilling. At the through-hole wall, the drill tool will either remove the ceramic particle or let it remain. This makes for a rough drilled hole-wall, which is actually better for plated copper adherence. Drilling the ceramic-loaded materials will damage the drill tool quickly, as well as the flute, and this is why the drill tool should not be reused. The starting drill parameters for this type of material are shown in FIGURE 8.

Minimizing heat to eliminate smear with PTFE is very important, but that is not the case with ceramic-filled resin systems. Of course, it is best to have drilling conditions that yield a good quality through-hole and with minimal smear. These materials can be processed in permanganate or standard FR-4 plasma cycles for desmear. The ceramic particles will not be affected by these processes, so it is necessary to have a high-pressure spray rinse after the desmear process to remove any loose ceramic particles.

The prepregs that are ceramic-filled resin systems will typically have less flow and will be sensitive to low-pressure areas during lamination. The low-pressure areas are frequently due to the design of the circuit. When there are many copper features aligned in the cross section of the circuit, the areas between these "stacked" copper features will have lower pressure and can cause the resin and ceramic particles to separate and not flow homogenously. The resin separation may have a different CTE than the homogenous prepreg and could have problems with solder or other elevated temperature exposures. To minimize this risk, there are several items to consider. In the lamination process: use a conformal material next to the panels; use the highest pressure possible; at the beginning of the cycle, have a hold for 20 minutes at the temperature where the prepreg will have the lowest viscosity; and ramp up to the cure temperature after the hold. An example of a circuit with low-pressure areas and resin separation is shown in FIGURE 9.

LCP circuit materials offer many unique characteristics for multiple end-user applications. These materials have been available in the industry for a number of years; however, they are not well adopted by traditional PCB fabricators. The reason is due to unique processing requirements and the need for some processes to be extremely well controlled.

Some of the excellent properties of the LCP material are: halogen-flee; consistent dk; low TCdk; dk vs. frequency is very good; low dissipation factor; dissipation factor vs. frequency is very good; very high frequency capable; extremely low outgassing; extremely low moisture absorption; no issue with CAF or electromigration; very high MOT (Maximum Operating Temperature) rating; nearly perfect hermetic sealed circuit possible; excellent chemical resistance; inert substrate; and is naturally flame retardant.

An example of a coplanar waveguide tested over a very wide frequency band and with different LCP thickness is shown in FIGURE 10.

In general, the main issues regarding LCP fabrication are: thin and soft laminates; dimensional stability (scaling) issues like thin flexible circuit materials; special high temperature lamination for LCP multilayers; special PTH preparation; drilling to avoid smear; venting; and border patterns for lamination.

The lamination for a pure LCP multilayer will require a high temperature lamination that is well controlled for temperature and pressure distribution. The lamination materials that will be placed next to the LCP circuit material need to be very conformal. Typically, several sheets of skived Teflon (2 sheets or 3 sheets of 2-mil Teflon) are used. The conforming Teflon sheets offer the benefit of pushing the bond layer of the LCP into the circuit geometry and helping to minimize any detrimental effect due to pressure distribution anomalies.

There will be some small amount of out gassing during the lamination cycle, and since LCP is a very good vapor barrier, having venting holes and good border channels is important. For the inner layer circuit border pattern, a dot pattern should be used to ensure that there are complete venting paths to the outside edge of the circuit panel. These dot patterns should not align layer-to-layer. The venting holes should be drilled through all layers, as many as possible, and are non-PTH holes. Prior to the high temperature lamination, the LCP materials should have had a good acid rinse and a bake at 121[degrees]C (250[degrees]F) for four hours.

The high temperature lamination cycle uses a dwell at 260[degrees]C (500[degrees]F) with low pressure and vacuum assist in order to help remove the outgassing prior to raising the pressure and temperature for the fusion bond cycle. This is shown in FIGURE 11.

The drilling operation is also important and has similar concerns as drilling PTFE substrate. The main concern is to minimize the risk of smearing the substrate, which means minimizing the heat generation during the drilling process. Parameters for drilling LCP are shown in FIGURE 12.

When drilling small holes or high aspect ratio, a peck drilling procedure may be needed. The maximum peck depth should not exceed 0.015 inches. The drill tool should be high-quality carbide and only one new tool should be used.

The drilled hole-wall preparation for PTH can use either a chemical process or a plasma process. The chemical process uses a high concentration of KOH. The plasma process is recommended, and the parameters for this process are shown in FIGURE 13.

There are many PCB applications where combinations of different circuit materials are used. Some applications will have high frequency circuit materials used on the PCB layers that are critical to electrical performance, while the other layers may use FR-4 materials.

A common mixed material PCB uses one layer of a nonPTFE ceramic-filled substrate for Layers 1 and 2, which make up a high frequency microstrip transmission line. The other layers of the PCB are more traditional PCB materials, such as FR-4, and are not electrically critical. With Layer 1 being the signal and Layer 2 the ground plane, the bonding materials below Layer 2 can be FR-4 prepreg. These hybrids can typically be manufactured with good yields, assuming some caution is taken during a few processes. One area of concern would be the unbalance of material types, resulting in a possible warp issue. The most effective procedure to minimize the warp issue of the mixed materials occurs during the lamination cycle, specifically at the end of the cycle and after the prepreg is fully cured. The pressure should be minimized to 50 psi and held for 30 minutes. This low-pressure cycle is held while still at the cure temperature.



Another common mixed material PCB combines a ceramic-filled PTFE substrate and FR-4. The ceramic-filled PTFE is a closer match to the FR-4 thermal/mechanical properties and will result in a simpler PCB process. The PTFE substrate typically does not warp because it is very soft compared to the FR-4. During the lamination cycle, the FR-4 substrates will expand/ shrink due to the temperature excursions, and the PTFE will be so soft that it will follow the FR-4 movement. The drilling must be tailored to be optimal for the PTFE, and the preparation for PTH will have several stages. The first stage is to desmear and treat the FR-4 material as necessary for the PTH preparation. The next stage will be to treat the PTFE for the PTH process. If a wet PTH preparation process is used for either the FR-4 or the ceramic-filled PTFE, then a bake at 121[degrees]C (250[degrees]F) for 1 hour to 2 hours is necessary just prior to the copper plating process.

A special rigid-flex construction is a more exotic hybrid combination that has the potential to be extremely good for high frequency applications and has mechanical flexibility. This circuit would use the LCP materials for the flexible portion and the non-PTFE ceramic substrates for the rigid portion. This combination would have several advantages. The transition from the rigid board areas to the flexible areas will not have connectors, and the connection is built into the circuit. The lack of connectors means the cost for the connectors, assembly and reliability issues of connectors goes away. Also, if the design accounts for the transition from the rigid material to the flexible materials correctly, there can be no impedance difference, resulting in a clean signal transition. For this type of circuit, the drill parameters will need to use the LCP parameters. The plated through-hole preparation will be several stages, as previously described. The last stage of the preparation process will be for the LCP materials.


While PTFE substrates can be more difficult to fabricate, they do deliver superior performance. The best material for electrical performance is the nearly pure PTFE substrates. These types of materials have been used for the most demanding electrical applications and have very specific fabrication guidelines. Adding ceramic filler to the PTFE will lower the CTE, which is good for multilayer circuits and PTH reliability. This addition also makes the material friendlier to PCB fabrication; however, it slightly degrades the electrical performance.

The non-PTFE materials are typically the most friendly to the PCB fabrication process and can have good electrical properties. There are many types of prepreg that can be used with this type of material, and most of them have very different processing guidelines. Lastly, the LCP materials offer a multitude of benefits to many applications. However, the PCB fabrication process requires special equipment and must be well controlled.

In summary, each type of high frequency material has its own unique circuit fabrication concerns. Sometimes there are interactions between the high frequency circuit materials and the PCB fabrication process that can affect the circuit performance for the end user. That is why it is critical for PCB fabricators to understand the specific processing concerns related to these materials. Understanding the materials' unique processing requirements will help the PCB fabricator achieve good manufacturing yields along with high quality and increased reliably in the finished circuit board.


(2.) Thompson, Kirby, Papapolymerou, Tentzeris, "W-Band Characterization of Finite Ground Coplanar Transmission Line on Liquid Crystal (LCP) Substrates" IEEE Polytronic Conference 2003.

JOHN COONROD is a market development engineer at Rogers Corporation;
FIGURE 5. A list of high performance bonding materials.

Bonding Dielectric Dissipation Lamination
Material Constant Factor Temperature (F)

FEP 2.10 0.0010 565
RO3003[TM] 3.00 0.0013 700
RO3006[TM] 6.15 0.0020 700
ULTRALAM[R] 3908 2.90 0.0025 554
3001 2.30 0.0030 425
RO3010[TM] 10.80 0.0023 700
RO4450B[TM] 3.90 0.0040 350
RO4450F[TM] 3.90 0.0040 350
SPEEGBOARD[R] C 2.60 0.0040 440
FR4 4.50 0.0180 360

Bonding Preparation Re-melt
Macerial for PTH Temperature (F)

FEP Special 520
RO3003[TM] Special 640
RO3006[TM] Special 640
ULTRALAM[R] 3908 Special 520
3001 Special 350
RO3010[TM] Special 640
RO4450B[TM] Standard N/A
RO4450F[TM] Standard N/A
SPEEGBOARD[R] C Special 640
FR4 Standard N/A

FIGURE 6. Drilling parameters for PTFE substrates.

 Nearly Pure Ceramic
 PTFE filled PTFE

Entry Material Phenolic Phenolic
Exit Material Phenolic Phenolic
Drill tool Carbide Carbide
Infeed 1-2mil/inch 2-3mil/inch
SFM 150-250 200-300
Retract rate <500 inch/min. <500 inch/min.
Drill life ~500-750 hits ~250-500 hits

FIGURE 7. Recommended plasma cycle for ceramic-filled
PTFE substrates.

Gasses N[H.sub.3] or (70% [H.sub.2]/30% [N.sub.2])
Pressure 100 mTorr Pump-down
Gasses 250 mTorr Operating
Power 4000 Watts
Frequency 40 KHz
Voltage 500-600 Volts
Cycle Time 10-30 minutes

FIGURE 8. Drilling parameters for non-PTFE ceramic-filled
resin systems.

Surface Speed 300-500 SFM
Chip Load 0.002"-0.004"/rev.
Retract Rate 500 IPM
Tool Type Standard Carbide
Tool Life 2000 hits

FIGURE 12. Drilling conditions for LCP multilayers.

Chip Load 0.001" to 0.002"/rev.
Spindle Speed 200 to 500 SFM
Retract Rage 200 to 600 IPM
Entry Material 0.007" Aluminum
Exit Material Phenolic

FIGURE 13. Plasma process for LCP substrates.

 Gas Type, %

Segment C[F.sub.4] [O.sub.2]

1 0 80
2 10 80
3 0 0

 Gas Type, %

Segment [N.sub.2] [H.sub.2]

1 20 0
2 10 0
3 90 10

 Vacuum, Temperature,
Segment mTorr C Time, min.

1 250 70 45
2 240 105 25
3 250 105 60
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Author:Coonrod, John
Publication:Printed Circuit Design & Fab
Date:Apr 1, 2009
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