Poseidon Design Systems' Virtex-4 PowerPC Accelerator Has Been Selected for The GSPx2005 Best New Product Forum Award.SAN JOSE, Calif. -- The award recognizes the best new hardware and software products in the areas of signal processing, DSPs, embedded applications and EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. tools for developing signal-processing chips or subsystems. "The award is a great honor for us and represents the next milestone in the ongoing success story of Poseidon. Our technology will change the way designers approach embedded DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive design," said Ravi Janak, President and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Poseidon. "The higher level of abstraction The level of complexity by which a system is viewed. The higher the level, the less detail. The lower the level, the more detail. The highest level of abstraction is the single system itself. provided by Poseidon tools enable designers to efficiently meet the complex requirements of today's designs." About Poseidon Triton Tools The Triton Tools environment augments existing design flows to help the designer optimize performance, power, and cost of processor-based architectures. With Poseidon's Builder and Tuner, designers can automatically take advantage of complex features and architectures to fully develop efficient processor based systems. The Builder tool provides the designer with the capability to make architecture tradeoffs between the PowerPC APU APU Azusa Pacific University APU Auxiliary Power Unit APU Alaska Pacific University APU Asia Pacific University (Japan) APU American Public University APU Anglia Polytechnic University (Chelmsford) and PLB (Picture Level Benchmark) A benchmark for measuring graphics performance on workstations. The Benchmark Interface Format (BIF) defines the format, the Benchmark Timing Methodology (BTM) performs the test, and the Benchmark Reporting Format (BRF) generates results in interfaces. The tool automatically creates a complete communication system utilizing the capability of the selected interface. With the Builder tool, time critical algorithms can also be easily partitioned from software to hardware and an efficient hardware accelerator generated. The APU controller provides a flexible high-bandwidth interface between the reconfigurable logic in the FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. fabric and the instruction pipeline of the integrated IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) PowerPC(TM) 405 CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. . The user now has the flexibility to select a tightly coupled APU and/or a bus based DMA architecture maximizing the performance of the resultant system. "The fundamental value of system level solutions is to enable architects to deal with growing complexity in DSP intensive designs and optimize for performance, energy consumption, and cost," said Will Strauss, President of Forward Concepts, who is internationally-recognized authority on Digital Signal Processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). (DSP) Technology. "Poseidon's innovative Tool suite has created significant value in the hands of FPGA and ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. architects." Poseidon's Tuner tool offers hardware and software architects an easy to use SystemC simulation environment to quickly analyze and optimize complex systems. The tools can be used to create a complete analysis, optimization, acceleration and verification flow for the processor architecture and created accelerator. The tools are integrated with the EDK and ISE Ise (ē`sā), city (1990 pop. 104,164), Mie prefecture, S Honshu, Japan, on Ise Bay. It is one of the foremost religious centers of Shinto, the site of the shrines of Ise. development tools and form a simple and efficient design flow. With Poseidon Triton tools designers can quickly tradeoff performance, power and cost while greatly reducing their time to market. These tools support ARM, PowerPC, MicroBlaze and Nios II architectures on ASIC, FPGA and structured array platforms. The solutions are optimized for video, VoIP, audio, imaging, wireless, networking, and security devices. "As a system-based EDA provider, we have empowered architects with a breakthrough solution to boost designer's productivity. This low-latency and high-bandwidth solution opens up an entire range of applications that can immediately benefit customers by achieving increases in system performance that were previously unattainable" said Farzad Zarrinfar, Poseidon's vice president of worldwide sales and marketing. "Moreover, this automation will allow design architects to concentrate on differentiated architecture from C specification; not on the low-level details of coding RTL, writing drivers, setting APU configuration registers, writing test benches, and building the bus interfaces." About Poseidon Design Systems Poseidon is an Electronic Design Automation company with offices in Atlanta, GA, San Jose, CA, and Bangalore, India. It was founded in July 2002 to provide products and services for modeling and designing processor-based SoCs. Poseidon's Electronic System Level tools allow users to rapidly analyze, optimize and accelerate a complete SoC system. For additional information about Poseidon Design Systems, visit www.poseidon-systems.com. About GSPx 2005 GSPx 2005 is the most comprehensive embedded solutions event with white paper presentations, technical workshops, technology panels, new products on the exhibit floor, and the First-Look New Product Forum. The conference targets design engineers and senior-level executives responsible for the development and management of embedded technologies as well as products incorporating such solutions. GSPx 2005 will cover embedded applications for automotive, biomedical, distributed processing, entertainment, image processing, radar imaging, security, speech processing, telecommunications, video and wireless. To register or exhibit at GSPx 2005, or for more information, visit www.gspx.com. Note: All trademarks and registered trademarks are the property of their respective owners. |
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