Phil Moorby Selected to Receive EDA Industry's Kaufman Award; Inventor of the Verilog Hardware Description Language Recognized as One of the Catalysts Behind Evolution & Growth of Electronic Design Automation Industry.

SAN JOSE, Calif. -- The Electronic Design Automation (EDA) Consortium today announced that Phil Moorby, the inventor of the Verilog hardware design language (HDL) and author of the first Verilog simulator, has been selected as this year's recipient of the EDA industry's prestigious Phil Kaufman Award. The Consortium will present the Award on Tuesday, November 1, at its 12th annual Award dinner and ceremony in Santa Clara, California.

The EDA industry fuels the trillion dollar global electronics industry, providing the critical technology to automate the design of electronics that enable the Information Age, including communications, computers, space technology, medical and industrial equipment and consumer electronics. EDA technologies make it possible for the world's electronic companies to keep up with the demand for smaller, faster, more powerful and lower cost electronic products.

Presented annually by the EDA Consortium, the Phil Kaufman Award honors an individual whose contributions have had measurable impact on the creativity and productivity of design engineers. For more information on the Award and to attend the event, go to www.edac.org.

Phil Moorby was selected to receive the Phil Kaufman Award because of contributions to the EDA industry that have resulted in the industry's growth and expansion. Most significantly, Phil defined and helped to popularize the Verilog HDL, which has become and today remains one of the world's most popular electronic design languages.

"The Verilog language has been a catalyst for EDA industry growth since 1985," noted Walden C. Rhines, EDA Consortium chairman and chairman and CEO of Mentor Graphics Corporation. "We are honoring Phil for his invention of this hardware design language, a language that contributes to an electronic designer's productivity, especially when combined with the many hundreds of commercial EDA tools that support it and its derivatives."

"Since the early 1970's, there have been many attempts to establish a pervasive industry standard for hardware description and fast simulation at the register transfer level," said Richard Newton, Dean of Engineering at UC Berkeley. "Nothing has ever succeeded anywhere near as well as Verilog, and there is no doubt that Phil Moorby's skill and technical insight is at the heart of that technology."

"The Kaufman Award provides a valuable opportunity for the design industry to recognize and appreciate outstanding accomplishments that benefit design engineers," said Aart de Geus, EDA Consortium Kaufman Award Committee chairman, and chairman and CEO of Synopsys, Inc. "Each year, we are challenged to select an individual whose EDA industry contributions have had a significant measurable impact on design engineer creativity and productivity. Phil Moorby is an innovator who truly embodies these ideals."

Phil Moorby received his Masters in computer science from Manchester University, England in 1974. Before 1983 he was part of the development of the HILO HDL and simulators. In 1984 he invented the Verilog HDL, and developed the industry standard simulator Verilog-XL, and became a Cadence Fellow in 1990. In 1999 he joined Co-Design Automation where the Superlog HDL was developed that became the basis of the SystemVerilog effort. In 2002 he became a Synopsys Scientist and is currently working on several aspects of the new SystemVerilog verification language and its implementation into the VCS suite of products.

About the Phil Kaufman Award

The Phil Kaufman Award was established by the EDA Consortium in honor of EDA industry pioneer Phil Kaufman, who turned innovative technologies like silicon compilation and emulation into businesses that have greatly benefited electronic designers. It has been presented annually since 1994.

About the EDA Consortium

The EDA Consortium is the international association of companies that provide tools and services that enable engineers to create the world's electronic products. The EDA Consortium seeks to identify and address issues that are common to its members and the customer community that the member companies serve. The EDA Consortium office is located at 111 West Saint John Street, Suite 220, San Jose, Calif. 95113, USA. For more information about the Consortium and how to become a member call 408-287-3322 or visit www.edac.org.

Notes to editors: A photo is available on request.

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