Pb-free flip chip and CSP inspection: area arrays face higher thermal stress, leading to topside ball delamination. A review of the literature, and a novel solution.

Ed.: For the full article and references, please see circuitsassembly. com/cms/content/view/1670/

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The extremely small component side joints of a flip chip or CSP are at greater risk of failing under mechanical stress. Toshio Nakamura and Gary Yu Gu have conducted extensive research to understand the failure mechanism by identifying likely fracture modes and potential delamination sites in flip-chip packages. Their research (1) shows that the upper solder connection is at greater risk of delamination. Likewise, Murtuza Rampurawala et al (2) call attention to topside ball delamination of CSP joints: "Cross-sectional analysis of failed assemblies found cracks within the solder joint along the component side of the assembly."

The CTE of the PCB substrate and component body are not the same, and the relative movement differential between the expanding materials increases at higher process temperatures. (2) During cooling, the relative movement differential between the contracting materials can cause shearing when the solder ball solidifies. Yu Gu and Nakamura also underscore this issue of increased stress at the corners of the package. (3) Increased corner ball stress as related to area array packages, especially in a Pb-free process, is clearly supported by Lau et al. (4)

[FIGURE 22 OMITTED]

The basic problems associated with FC and CSP solder joints are amplified in a Pb-free process due to three essential factors: 1) The process temperatures for Pb-free is higher, 2) the temperature at which a Pb-free solder joint solidifies is much higher and closer to the peak reflow temperature than with SnPb and 3) the effects of CTE mismatch are amplified at higher temperatures.

Ahmer Syed underscores the topside delamination problem: "[F]ailures ... were analyzed with dye and pry and cross-sectioning techniques. Overall, it was found that solder joint failure for all of these Pb-free alloys occur at the package side of the joint as is the case for SnPb alloy." (5) Syed further stated: "In all cases reported here, the solder joints failed at package interface."

FC and CSP packages in particular, have presented challenges for inspection because solder connections are both extremely small and hidden under the package. X-ray is common and useful, but has its drawbacks: (proper) interpretation of image data; the inability to "see" particular defects, such as delamination in the form of micro cracks; the cost of high-end equipment. Topside ball delamination of lead-free FC and CSP solder joints can present difficulties for even the best 3-D x-ray equipment.

A newly designed flip-chip optical inspection system can visually inspect the critical defect area and is a cost-effective alternative to destructive methods. The new optical head has a lowered iris (approximately 0.015 mm, reduced from about 0.30 mm from the PCB surface), making it possible to "look up" at the topside of the FC joint to defect defects. The low iris also permits inspection of interior topside fillet problems inside the component. In our studies, the optical system found a 0.02 mm micro crack on a Pb-free [mu]BGA that went undetected by x-ray (Figure 22).

Mark Cannon is president and COO and Juergen Friedrich is director, technical communications, ERSA GmbH (ersa.de); [e-mail].