Panasonic System Solutions Company picks Tharas Systems' Hammer to boost multi-media chip and system verification.Business Editors/High-Tech Writers SANTA CLARA Santa Clara, city, Cuba Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba. , Calif.--(BUSINESS WIRE)--June 3, 2003 Tharas Systems, Inc., a provider of high-performance, hardware-assisted design verification solutions, announced today that the Panasonic System Solutions Company, a division of Matsushita Electric Industrial Co., Ltd. has selected Hammer to enhance its functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, flow. "We are delighted that Panasonic System Solutions Company chose Hammer to boost its verification flow. More and more design teams are choosing Hammer over competitive solutions since Hammer offers the best price, performance and ease-of-use system in the industry," notes Rahm Shastry, President & CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Tharas Systems. "Panasonic System Solutions Company chose Hammer because of its fast compile times, predictable capacity and superior debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. capabilities," explains Satoru Natsui, Solution Architect and Vice President of Design Automation Business of Selastar Corporation. "Fast turnaround time (1) In batch processing, the time it takes to receive finished reports after submission of documents or files for processing. In an online environment, turnaround time is the same as response time. is essential while debugging a complex design." Tharas Systems' Hammer provides Verilog, VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and mixed language accelerated simulations with the fastest compile and run times, while at the same time offering ease of use and debug capabilities comparable to that of software simulators. Compile times are as fast as 50 Million RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; Gates per hour on a single workstation vs. several hours per Million RTL gate-equivalent for competing FPGA-based systems. Run times range from 20 to 1000 times faster than software simulators. Hammer's innovative hardware architecture is based on the state-of-the-art custom processor technology that outflanks Rent's rule Rent's Rule pertains to the organization of computing logic, specifically the relationship between the number of external signal connections to a logic block (i.e., the number of "pins") with the number of logic gates in the logic block, and has been applied to circuits ranging and a proprietary backplane that delivers more than 10 Gbps bandwidth, thereby minimizing run time degradation during debug. In addition, Hammer offers 100% source-level visibility without having to reconstruct signals -- a significant improvement over other hardware-assisted verification solutions. Hammer works with existing RTL and gate-level verification environments. As a result, designers can plug-n-play their existing verification software, including the most popular Verilog HDL-based simulators from Synopsys, Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ), Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. , Inc. (NYSE NYSE See: New York Stock Exchange :CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ) and Mentor Graphics (Nasdaq:MENT) and Debussy debug environment from Novas Software. Hammer supports design sizes of up to 128 Million Gates, and 16 Gigabyte of in-system memory. Hammer pricing ranges from US$115,000 to US$1,980,000. Hammer is marketed and serviced through a network of direct sales and distributors. In Japan, Hammer is solely marketed and supported by Selastar Corporation. About Tharas Systems Tharas Systems develops and markets high performance verification systems to designers of complex integrated circuits and electronic systems. The Tharas solution leads to significant shortening of the verification cycle; the payoff is material reduction in time-to-market. Hammer(TM) offers a patented, next-generation hardware accelerator for Verilog, VHDL and mixed language simulations with the fastest compile times and run times, while at the same time offering ease of use and debugging capability comparable to that of software simulators. Increasing verification complexity is one of the main challenges of designing complex integrated circuits and systems today. Founded in 1998, Tharas is privately held and funded by venture capital and private investors from throughout the electronics industry. Corporate headquarters is located at 3016 Coronado Drive, Santa Clara, Calif. 95054. Visit Tharas Systems at http://www.tharas.com/. For more specific product information, email info@tharas.com or call 1-408-855-3200. About Selastar Corporation Founded in 2001, Selastar is the sole distributor for Tharas Systems' product in Japan. Selastar is privately held and offers sales and service support to design and verification communities in Japan. Selastar Corporation is located at 3-9-5, Shinyokohama Kouhoku-ku, Yokohama-shi Kanagawa, 222-0033. Visit Selastar Corporation at http://www.selast.jp/. For more specific product information, please email tharas@selast.jp or call +81-45-478-2516. Note to Editors: Hammer(R) is a trademark of Tharas Systems Inc. Tharas acknowledges trademarks or registered trademarks of other organizations for their respective products and services. |
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