Packet Engines releases Packet Management Unit for 100 Mbps Fast Ethernet Switches.UNION CITY, Calif.--(BUSINESS WIRE)--March 19, 1996--Packet Engines Incorporated today announced the availability of a Packet Management Unit (PMU PMU Project Management Unit PMU Power Management Unit Pmu Pasteurella multocida PMU Pregnant Mare Urine (aka premarin) PMU Pick Me Up PMU Purdue Memorial Union (Purdue University) ) to support high-speed Ethernet Switches. The PMU can handle 100 Mbps switches, 10 Mbps switches and mixed 10 and 100 Mbps switches. The PMU helps switch designers get to market faster and allows vendors to provide sophisticated features in silicon. Initially designed to operate with the PS1000 Switch Engine chip set from MMC See MultiMediaCard and Microsoft Management Console. Networks, the PMU provides: -0- o address resolution logic (ARL ARL - ASSET Reuse Library ) o spanning tree protocol Based on an algorithm invented by Radia Perlman while working for Digital Equipment Corporation[1][2], Spanning Tree Protocol Is an OSI layer-2 protocol which ensures a loop free topology for any bridged LAN. (STP STP or standard temperature and pressure, standard conditions for measurement of the properties of matter. The standard temperature is the freezing point of pure water, 0°C; or 273.15°K;. ) support o forwarding controls for store-and-forward and cut-through o multiple priority forwarding o new station learning o address aging o packet filtering and sniffing o hooks for VLAN See virtual LAN. VLAN - Virtual Local Area Network support o table update algorithms o ECU-to-switch interface -0- The PMU performs both source address and destination address arbitration. This technology may be used to implement sophisticated filtering and security policies on the individual switch. The built-in ECU (Embedded Control Unit) interface provides a 16-bit data path plus control signals for connecting to an external control processor. For maximum integration, the PMU can be incorporated into a single chip with an appropriate ECU cell. With the appropriate supporting logic and configuration, the PMU can support packet rates equivalent to the wire speed rates for 16 100 Mbps ports operating in full duplex mode. The PMU is supplied in Verilog RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; form, complete with test bench facilities and training. The logic may be implemented in 0.8 micron CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. or smaller geometries. Packet Engines can also take the design or an enhanced version to the final chip. Reference Design In the case of the MMC networks system, the PS1001 QMU has a built-in ARL port. Packet Engines has a reference design that hooks to the ARL port to support a switch with 22 10 Mbps ports and two 100 Mbps ports. Many different port designs and layouts are possible up to and including pure 100 Mbps switches. As part of the program, Packet Engines provides architecture design support to assist systems vendors get the best out of their switch designs. "This is a flexible design capable of providing a range of switch features at a tremendous price," said Bernard Daines. Daines, president of Packet Engines, went on to say, "System vendors can now provide leading-edge, high-speed switching without long development lead times." About Packet Engines Packet Engines is a technology licensing company with development centers in Union City, Calif. and Spokane, Wash. Packet Engines Incorporated is the leading provider of "soft hardware" for the LAN (Local Area Network) A communications network that serves users within a confined geographical area. The "clients" are the user's workstations typically running Windows, although Mac and Linux clients are also used. industry. "Soft hardware" is the provision of hardware functions in high level design language. Customers purchasing these functions modify them and add them to other internally generated functions and embody the final result in silicon. Packet Engines can also take the design to silicon on behalf of the customer. The company has supplied 100 Mbps Ethernet technology to many leading network systems and semiconductor companies. Packet Engines is a key proponent of Gigabit Ethernet technology and is a key contributor to the IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. effort to study Gigabit extensions to the Ethernet standard. Packet Engines was founded by Bernard Daines, who was previously a founder of Grand Junction Networks. CONTACT: Packet Engines Incorporated Brian MacLeod, 408/732-3065 |
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