PMC-Sierra Introduces Industry's Highest Capacity Switching Fabric Chip Set For High Speed Switches and Terabit Class Routers.

Business/High Tech Editors

NOTE: Figures and a photo are available at www.newstream.com and

www.pmc-sierra.com/tt1

VANCOUVER, B.C.--(BUSINESS WIRE)--April 4, 2000

The new Tiny Tera One (TT1) chip set is the first to enable

320 Gigabits per second true aggregate bandwidth, offering almost twenty times the switching capacity over currently available solutions

PMC-Sierra (Nasdaq:PMCS) today announced the Tiny Tera One (TT1) switching fabric chip set for next generation, high speed carrier class equipment.

The new chip set features the Line Card to Switch (LCS) protocol to enable scaleable terabit routers, ATM switches, and optical switches capable of tens of gigabits per second (Gbit/s) through to tens of terabits per second (Tbit/s) aggregate bandwidth.

The TT1 chip set consists of four chips -- the PM9311 TT1 Scheduler, the PM9312 TT1 Cross Bar, the PM9313 TT1 Data Slice, and the PM9315 Enhanced Port Processor. This chip set's unique, scaleable architecture provides a single switching platform that supports today's high speed, mixed traffic, carrier class networks. The TT1 switching fabric supports line cards with both circuit-switched and packet-switched data traffic such as Internet Protocol (IP), Packet-Over-SONET, ATM and Frame Relay in any mix at rates up to OC-192 (10 Gbit/s) (See Figure 1).

The Unique Line Card to Switch (LCS) Protocol

The TT1 chip set is PMC-Sierra's first switching fabric semiconductor solution implementing the revolutionary Line Card to Switch (LCS) protocol. Next generation terabit class switches and routers will require multi-rack system implementations to deal with the power and mechanical constraints of such large aggregate bandwidth. The LCS architecture allows for physical separation between the switching fabric and the line card racks. It supports in-service switching fabric upgrades that enable systems to scale from tens of gigabits to tens of terabits capacity while retaining the capital investment in the line card racks. A white paper on the LCS protocol is available on PMC-Sierra's web site at http://www.pmc-sierra.com/lcs.

"When you combine the TT1's level of capacity with our new LCS protocol, our customers can easily implement carrier class switching architectures that can scale to terabits through in-service upgrades," said Anders Swahn, PMC-Sierra's vice president and general manager for the Carrier Switching Division. "This will allow service providers to retain their capital investment in line card racks and software."

Pricing, Packaging and Customer Support

All four devices in the chip set are now sampling to a limited set of customers in 3.3 volt, low power 0.25 micron CMOS technology. The PM9311/TT1 Scheduler and the PM9312/TT1 Cross Bar chips are packaged in 1088-pin flip-chip CCGA, the PM9313/TT1 Data Slice chip is packaged in a 474-pin flip-chip CBGA, and the PM9315/Enhanced Port Processor chip is packaged in a 624-pin flip-chip CBGA. Pricing in low volume quantities is $384 for the PM9313/TT1 Data Slice, $880 for the PM9315/Enhanced Port Processor, $1693 for the PM9312/TT1 Cross Bar, and $3963 for the PM9311/TT1 Scheduler. TT1 data sheets and a technical overview are available on PMC-Sierra's web site at http://www.pmc-sierra.com. In addition, PMC-Sierra's unique TT1 reference system is available under license to accelerate design time, reduce technical risk, and reduce time-to-market.

Key Features of the TT1 Chip Set

PMC-Sierra's TT1 chip set can be configured in increments of 10 Gbit/s per port up to a maximum configuration of 32 ports. Each fabric port supports either OC-192 (10 Gbit/s) payloads or 4 x OC-48 (4 x 2.5 Gbit/s) payloads. By supporting OC-192 payloads, the TT1 chip set can "future proof" systems for the next mainstream generation of OC-192 dense wavelength division multiplexing (DWDM) transport technology. The TT1 chip set is a single stage switching fabric with virtual output queuing that makes system hardware and software architectures very easy to implement with a highly predictable performance. The LCS protocol that serves as the interface between the TT1 switching fabric and the line card can be implemented as an electrical interface in systems where the switching fabric port is on the same circuit board as the line card. In systems where the line card rack is physically separated from the switching fabric, the LCS protocol and the TT1 chip set provide support for multimode VCSEL (Vertical Cavity Surface Emitting Laser) array fiber optic components. In this configuration, the architecture can enable up to 200 feet separation between the switching fabric and a line card (see Figure 2).

About PMC-Sierra

PMC-Sierra's extensive family of broadband communication semiconductors is enabling the equipment that makes up the backbone of the Internet. The company develops Internet Protocol (IP), ATM, SONET/SDH, T1/E1 and T3/E3 solutions for wide area network and Internet infrastructure equipment. PMC-Sierra's quality system is registered with the Quality Management Institute to the ISO 9001 standard. As co-founder of the SATURN Development Group, PMC-Sierra works with over 30 other member companies to define and develop interoperable, standard-compliant solutions for high speed networking applications.

PMC-Sierra offers worldwide technical and sales support including a network of offices throughout North America, Europe and Asia. The company's headquarters are located in Burnaby, British Columbia. PMC-Sierra is publicly traded on the Nasdaq Stock Market under the symbol "PMCS". The company is included in the Nasdaq-100 Index (NDX) which contains the largest non-financial companies on the Nasdaq Stock Market. The Nasdaq-100 Index is the benchmark for the Nasdaq-100 Index Tracking Stock (AMEX:QQQ). For more information about PMC-Sierra, visit http://www.pmc-sierra.com.

Attachments

NOTE: Figures and a photo are available at www.newstream.com and

www.pmc-sierra.com/tt1

Figure 1: Typical system implementing the TT1 chip set Figure 2: Typical OC-192c line card interfacing to the TT1 fabric Photo of TT1 chip set

Technical Glossary ATM Asynchronous Transfer Mode CBGA

Ceramic Ball Grid Array CCGA Ceramic Column Grid Array DWDM

Dense Wavelength Division Multiplexing IP Internet Protocol LCS Line Card to Switch OC Optical Carrier SDH  Synchronous Digital Hierarchy --

the European counterpart to SONET SONET Synchronous Optical NETwork TT1 Tiny Tera One chip set VCSEL Vertical Cavity Surface Emitting Laser

(c)Copyright PMC-Sierra, Inc. 2000. All rights reserved. SATURN(R) is a registered trademark of PMC-Sierra, Inc. PMC-Sierra(TM) trademark of PMC-Sierra, Inc.