Open SystemC Initiative Delivers SystemC v2.0 Specification and v1.2 Beta Open Source Code; Key Steps On Broad Industry Roadmap for System Modeling.Business Editors & High Tech Writers
YOKOHAMA, Japan--(BUSINESS WIRE)--Feb. 1, 2001
At the SystemC Users Forum meeting in conjunction with ASP-DAC ASP-DAC Asia and South Pacific Design Automation Conference (Japan) , the Open SystemC Initiative (OSCI) Steering Group announced immediate availability of the SystemC v2.0 specification and v1.2 beta software Noun 1. beta software - software that has not yet been released but has received an alpha test and still has more bugs than a regular release; "beta software is usually available only to particular users who will test it" . These key steps on the organization's roadmap to SystemC v2.0 extend existing hardware and software modeling capabilities into higher levels of abstraction In object technology, determining the essential characteristics of an object. Abstraction is one of the basic principles of object-oriented design, which allows for creating user-defined data types, known as objects. See object-oriented programming and encapsulation.
1. that allow designers to model the entire system. These significant enhancements advance the evolution of SystemC as the standard system-level modeling platform that enables and accelerates system-level design and IP exchange.
"Since Cadence cadence, in music, the ending of a phrase or composition. In singing the voice may be raised or lowered, or the singer may execute elaborate variations within the key. joined the OSCI Steering Group last June, we've been very impressed with the speed of SystemC evolution within the organization," stated Stanley J. Krolikoski, Vice President System Level Product Marketing at Cadence. "This newly announced set of deliverables is testament to the team's rapid development process and establishes a new baseline for support of virtually all system modeling needs."
Evolution to Version 2.0
OSCI's newest offerings on the SystemC website, www.systemc.org, include foundational building blocks for v2.0, the next-generation of SystemC. A SystemC roadmap describes the logical stages in evolution from a lower-level hardware-centric to a higher-level system-centric language. The SystemC v2.0 detailed specification defines the features and constructs of system-level modeling enhancements to C++. SystemC v1.2 beta is a bridge between v1.1 and v2.0. It adds a model of time consistent with the SystemC roadmap and bug fixes A revised program file or patch that corrects a software bug. See bug, patch and hot fix.
(programming) bug fix - A change to a program or system intended to permanently cure a bug. and enhancements to previous releases. Users can now define their own protocols in addition to the standard bus protocols provided, and there are extensions to event notification Event notification is a term used in conjunction with communications software for linking applications that generate small messages (the "events") to applications that monitor the associated conditions and may take actions triggered by events. dynamic sensitivity. All developments are the result of collaboration between OSCI member companies.
"We've been extremely pleased with the contributions from member companies," stated Janice Benzel, Austin Systems Methodology Manager, Motorola's Semiconductor Products Sector. "Most impressive was the ability of three significant EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. players - Cadence, CoWare and Synopsys - to look beyond their differences and work together with semiconductor/system providers to develop a solution that will work for the entire industry."
SystemC v2.0 - meeting the needs of system designers
"SystemC v2.0 will provide an excellent solution that's broadly applicable for both EDA tool and IP use," stated Takashi Hasegawa Takashi Hasegawa is an electrical engineer and programmer, who works at the Optoelectronic System Laboratory of Hitachi Cable, Ltd.
Hasegawa graduated with a Ph.D. in electrical engineering from Nagoya University. , Fujitsu's Director of Strategic Software Systems, World Wide System LSI LSI: see integrated circuit.
(Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Technologies. "As one of the companies that collaborated extensively on this specification, Fujitsu believes it is a significant improvement that covers our requirements for system-level design."
While SystemC 1.0 provides a base functionality for modeling hardware IP blocks, SystemC 2.0 will provide capabilities for modeling and refining systems that include both hardware and software. Key to this objective are the abilities to work at higher levels of abstraction, to provide flexible communication channel refinement, to encourage hardware/software interaction, and to allow a wider range of models of computation.
SystemC v2.0 extends the system-level foundation for fast and reliable system design. Under SystemC v2.0, communication between system-level functional blocks can be modeled and refined independently of function. The flexible semantic foundation additions of SystemC v2.0 support most models of computation within one environment and support almost all system modeling needs.
User Participation Encouraged
At the SystemC Users Forum meeting, participants strengthened their involvement in the evolution of the SystemC language to ensure it will continue to meet their needs. Several enhancement suggestions have already been made, including provisions for analog and mixed-signal design as well as enhancements to the software flow including dynamic threads, RTOS (1) (RealTime Operating System) An operating system designed for use in a real time computer system. See real time system, embedded system, process control and OS-9. modeling, and interrupt modeling.
OSCI's SystemC v2.0 specification and SystemC v1.2 beta software is available for download now at www.systemc.org. The SystemC 2.0 software is planned for release in Q3 2001. All versions of source code are available through Open Source Licensing at no cost to the licensee licensee n. a person given a license by government or under private agreement. (See: license, licensor)
LICENSEE. One to whom a license has been given. 1 M. Q. & S. 699 n. .
The Open SystemC Initiative establishes an interoperable The ability for one system to communicate or work with another. See interoperability. , open modeling platform to promote the growth of C-based design and enable exchange of system-level C++ models and co-design. The collaboration will establish a de-facto modeling standard for the benefit of the electronics industry. There is broad and growing support for SystemC from leading companies in the IP, EDA, semiconductor, electronic systems, and embedded software Instructions that permanently reside in a ROM or flash memory chip. Embedded software may be immediately available to the CPU or, for faster execution, may be transferred to RAM first and then executed. industries. The SystemC modeling platform, which includes the SystemC specification, source code and reference manual, can be downloaded at www.systemc.org.
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