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OSE Systems Announces RTOS and Development Tool Support for Motorola's PowerQUICC III Architecture.


Business Editors/High-Tech Writers

Smart Networks Developer Forum

DALLAS--(BUSINESS WIRE)--March 25, 2003

Combination of OSE OSE - Open Systems Environment  Systems and Motorola PowerQUICC Processors

Provides Powerful Hardware and Software; Platform Solution for

Networking and Communications Applications

OSE Systems, the leading supplier of operating systems Operating systems can be categorized by technology, ownership, licensing, working state, usage, and by many other characteristics. In practice, many of these groupings may overlap.  for the communications market, today announced that it will make its OSE real-time operating systems (RTOS (1) (RealTime Operating System) An operating system designed for use in a real time computer system. See real time system, embedded system, process control and OS-9. ) and development tools available for Motorola's latest PowerQUICC(TM) III architecture, beginning with the MPC (1) (Mobile PC) A handheld or laptop computer. See handheld computer, laptop computer and Ultra-Mobile PC.

(2) (MultiPath Channel) See multipath.
8560 and MPC8540 communications processors. The OSE RTOS and tool chain, optimized for high-availability, distributed communications and networking applications, will provide the industry's most flexible and robust development and run-time platform for the PowerQUICC architecture.

"We are very pleased that OSE Systems has committed to provide RTOS support for our high-performance PowerQUICC III communications processors," said David Perkins David Perkins could refer to any of the following people:
  • David Perkins (footballer)
  • David Perkins (geneticist)
  • David Perkins (guitarist)
  • David Perkins (mathematician)
, corporate vice president and general manager of Motorola's Networking and Computing Systems Group. "The combination of PowerQUICC III processors and the OSE RTOS will provide a powerful communications platform to meet our customers' bandwidth-intensive application requirements."

"Motorola has been the market leader since the introduction of the industry's first communications processor," said Vance Hilderman, vice president of OSE Systems, North America. "We consider the advent of PowerQUICC III processors to be another communications milestone and are proud to support this new architecture from its inception. The new PowerQUICC III architecture, together with the OSE RTOS, will provide a highly integrated, best-in-class platform that paves the way for a new class of high-performance communications applications."

The OSE operating system is built from the ground up for distributed, multi-channel, multi-function communications applications requiring the utmost in reliability, security, and availability. Utilizing a memory management system that takes full advantage of the PowerQUICC processor's hardware MMU (Memory Management Unit) The part of the computer that governs memory access. Either part of the CPU chip or housed on separate chips, the MMU controls memory partitions and virtual memory. See memory and virtual memory.

MMU - Memory Management Unit
, OSE makes it easy to partition complex applications in a way that minimizes susceptibility to both internal bugs and external hackers and viruses.

OSE's Link Handler provides a flexible, message-based communications framework for building distributed PowerQUICC processor-based networks using the processor's RapidIO switched-fabric interconnect. The Link Handler's hardware- and application-independent messaging interface makes interprocess communications transparent to programs running on different CPUs. This seamless interface makes it easy to create multi-processor applications that can be readily distributed across any number of PowerQUICC processors. It also enhances flexibility by facilitating reconfiguration without the need for source code changes at the driver or application level.

About Motorola's PowerQUICC III Processor Architecture

The PowerQUICC III is a high-performance communications controller that combines a PowerPC Book E e500 core, some standard peripherals, and an optional multi-channel Communications Processor Module (CPM). The e500, equipped with 256 kbytes of L2 cache and single-precision floating-point unit with SIMD (Single Instruction stream Multiple Data stream) A computer that performs one operation on multiple sets of data. It is typically used to add or multiply eight or more sets of numbers at the same time for multimedia encoding and rendering as well as scientific  capability, operates at speeds of up to 1 GHz and delivers a peak performance of up to 1850 MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. . Standard PowerQUICC III peripherals include a DDR SDRAM memory controller, 64-bit PCI/X/PCI controller, a RapidIO port, and a pair of 10/100/1000 Ethernet controllers. The RISC-based CPM features three fast serial communications controllers (FCCs), two multichannel Using two or more paths for transmission or processing. It can refer to a variety of architectures including (1) multiple I/O channels between the CPU and peripheral devices, (2) multiple wires in a cable, (3) multiple "logical" channels within a single wire or fiber or (4) multiple  controllers (MCCs), four serial communications controllers (SCCs), one serial peripheral interface (communications, hardware) Serial Peripheral Interface - (SPI) A serial interface in which a master device supplies clock pulses to exchanges data serially with a slave over two data wires (Master-Slave and Slave-Master).  (SPI (1) (Stateful Packet Inspection) See stateful inspection.

(2) (Service Provider Interface) The programming interface for developing Windows drivers under WOSA.
) and one I2C I2C Inter-Integrated Circuit
I2C Intelligent Interface Controller
I2C Intelligent Controller
 interface.

The first members of the PowerQUICC III family are the MPC8560 and MPC8540 processors. The MPC8560 combines the basic PowerQUICC III architecture with the CPM. The MPC8540 processor is not equipped with the CPM, but instead adds a single 10/100 Ethernet port and a DUART DUART Dual Universal Asynchronous Receiver/Transmitter
DUART Dual Universal Asynchronous Receiver Transmitter
. The high level of integration offered by all PowerQUICC III products helps simplify board design and offers significant bandwidth and performance for high-end control-plane and data-plane applications.

About OSE Systems

OSE Systems is the technological leader of real-time operating systems software and services for the communications market. OSE is also used in safety-critical, high-availability, distributed and fault-tolerant applications such as avionics, medical, automotive and industrial control. Customers include industry leaders such as Ericsson, Lockheed Martin, Samsung, Agere Systems, Sony and Boeing. OSE is a subsidiary of Enea Data (SAXESS: ENEA). Enea markets and sells services, products and training in specialized technical arenas, including real-time application development and support for embedded systems as well as IT and e-business solutions. Located in Stockholm, Sweden, Enea employs approximately 600 people worldwide. For more information on OSE, please visit www.ose.com. For more information on Enea please visit www.enea.com.

OSE is a registered trademark of OSE Systems. All other company or product names are the registered trademarks or trademarks of their respective owners.

The Motorola PowerQUICC family contains PowerPC processor cores.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Mar 25, 2003
Words:734
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