OPEN SYSTEMC INITIATIVE DELIVERS SYSTEMC V2.0 SPECIFICATION AND V1.2 BETA OPEN SOURCE CODE.

At the SystemC Users Forum meeting in conjunction with ASP-DAC, the Open SystemC Initiative (OSCI) Steering Group announced immediate availability of the SystemC v2.0 specification and v1.2 beta software. These key steps on the organization's roadmap to SystemC v2.0 extend existing hardware and software modeling capabilities into higher levels of abstraction that allow designers to model the entire system. These significant enhancements advance the evolution of SystemC as the standard system-level modeling platform that enables and accelerates system-level design and IP exchange.

"Since Cadence joined the OSCI Steering Group last June, we've been very impressed with the speed of SystemC evolution within the organization," stated Stanley J. Krolikoski, Vice President System Level Product Marketing at Cadence. "This newly announced set of deliverables is testament to the team's rapid development process and establishes a new baseline for support of virtually all system modeling needs."

OSCI's newest offerings on the SystemC website, www.systemc.org, include foundational building blocks for v2.0, the next-generation of SystemC. A SystemC roadmap describes the logical stages in evolution from a lower-level hardware-centric to a higher-level system-centric language. The SystemC v2.0 detailed specification defines the features and constructs of system-level modeling enhancements to C++. SystemC v1.2 beta is a bridge between v1.1 and v2.0. It adds a model of time consistent with the SystemC roadmap and bug fixes and enhancements to previous releases. Users can now define their own protocols in addition to the standard bus protocols provided, and there are extensions to event notification dynamic sensitivity. All developments are the result of collaboration between OSCI member companies.

"We've been extremely pleased with the contributions from member companies," stated Janice Benzel, Austin Systems Methodology Manager, Motorola's Semiconductor Products Sector. "Most impressive was the ability of three significant EDA players - Cadence, CoWare and Synopsys - to look beyond their differences and work together with semiconductor/system providers to develop a solution that will work for the entire industry."

"SystemC v2.0 will provide an excellent solution that's broadly applicable for both EDA tool and IP use," stated Takashi Hasegawa, Fujitsu's Director of Strategic Software Systems, World Wide System LSI Technologies. "As one of the companies that collaborated extensively on this specification, Fujitsu believes it is a significant improvement that covers our requirements for system-level design."

While SystemC 1.0 provides a base functionality for modeling hardware IP blocks, SystemC 2.0 will provide capabilities for modeling and refining systems that include both hardware and software. Key to this objective are the abilities to work at higher levels of abstraction, to provide flexible communication channel refinement, to encourage hardware/software interaction, and to allow a wider range of models of computation.

SystemC v2.0 extends the system-level foundation for fast and reliable system design. Under SystemC v2.0, communication between system-level functional blocks can be modeled and refined independently of function. The flexible semantic foundation additions of SystemC v2.0 support most models of computation within one environment and support almost all system modeling needs.

At the SystemC Users Forum meeting, participants strengthened their involvement in the evolution of the SystemC language to ensure it will continue to meet their needs. Several enhancement suggestions have already been made, including provisions for analog and mixed-signal design as well as enhancements to the software flow including dynamic threads, RTOS modeling, and interrupt modeling.

OSCI's SystemC v2.0 specification and SystemC v1.2 beta software is available for download now at www.systemc.org. The SystemC 2.0 software is planned for release in Q3 2001. All versions of source code are available through Open Source Licensing at no cost to the licensee.

The Open SystemC Initiative establishes an interoperable, open modeling platform to promote the growth of C-based design and enable exchange of system-level C++ models and co-design. The collaboration will establish a de-facto modeling standard for the benefit of the electronics industry. There is broad and growing support for SystemC from leading companies in the IP, EDA, semiconductor, electronic systems, and embedded software industries. The SystemC modeling platform, which includes the SystemC specification, source code and reference manual, can be downloaded at www.systemc.org.